fiasco.oc i.MX7d port
Marc CHALAND <[email protected]>
| Newsgroups | gmane.comp.micro-kernel.l4.devel |
|---|---|
| Message-ID | <CAHxfmfDDc=XvQUrTFCZaQBNpf=R3QM6at=vR3dkCxEqRP-yK0w@mail.gmail.com> |
Le mercredi 12 octobre 2016, Adam Lackorzynski <[email protected] <javascript:_e(%7B%7D,'cvml','[email protected]');>> a écrit : > > I do not see anything obviously wrong right away. I assume it passes the > while loop? > Yes, the while loop exits. In fact, I think uboot powers up core1. I saw some piece of code. So I asserted that core1 starts on tramp func and I saw that SCU was manipulated. But I don't understand what is done after. Perhaps it is not compatible with A7 and/or i.MX7 ? I've put a log into boot_ap_cpu() and it is not reached. Is there a way to test if something is wrong between tramp_mp_entry and boot_ap_cpu() ? Regards Marc _______________________________________________ l4-hackers mailing list [email protected] http://os.inf.tu-dresden.de/mailman/listinfo/l4-hackers