Re: I/O flexpages / new mapping DB issue with overlapping ports

Frank Mehnert <[email protected]>
Newsgroups gmane.comp.micro-kernel.l4.l4ka.general
Organization InnoTek Systemberatung GmbH
Message-ID <[email protected]>
On Thursday 08 June 2006 20:06, Espen Skoglund wrote:
> [Frank Mehnert]
> > Another related question comes up: Since the kernel allows Sigma0 to
> > map every I/O flexpage the responsibility lies at the privileged
> > tasks to prevent mapping of I/O ports the kernel uses itself. I
> > assume the same applies to MSRs. However, neither Sigma0 nor root
> > task have any information about the I/O ports and MSRs the kernel is
> > using.
>
> [...]
>
> There was at some stage some loose talk about implementing an MSR
> space with similar semantics as the IO space.  This is quite trivial
> to do using the current code base in Pistachio.  Whether there are any
> real benefits to doing so is a different question.

In difference to the IO space the MSR space would contain only one fpage
covering the whole MSR space as long as we don't talk about VT. Since
I'm not aware of any MSR which is frequently read or written, there is
probably no reason to allow non-privileged tasks the access to MSRs.

Frank
-- 
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