Re: 16-bit code and L4

"Valery V. Sedletski" <[email protected]> Thu, 21 Jun 2007 03:55:24 +1300 (MSD)

Newsgroups	gmane.comp.micro-kernel.l4.devel,gmane.comp.micro-kernel.l4.l4ka.general
Message-ID	<[email protected]>

>>> 2) Must all the segment registers be CS == DS == ES == FS == GS == SS == FLAT in L4 usermode 
>programs (in Intel 
>>> architecture implementation)? Or, there exist a possibility to use segments other than FLAT?
>>>   
>>Fiasco preserves some of these segments (e.g., GS to support thread 
>>local storage). However, unless OS/2 makes use of these segments in 
>>32-bit mode there is no need to change these from a flat setting.
>
>It seems, that OS/2 does not use GS (GS seems to be always == 0), at least, in application programs.
>

But also FS is used to address a structure named Thread Info Block (TIB), it is also not flat (it has a limit=0x30)
So, FS is used by OS/2 and programs depend on it. GS seems to be not used, and ES and DS are generally 
flat.