Re: 16-bit code and L4
Adam Lackorzynski <[email protected]>
| Newsgroups | gmane.comp.micro-kernel.l4.devel,gmane.comp.micro-kernel.l4.l4ka.general |
|---|---|
| Message-ID | <[email protected]> |
On Thu Jun 21, 2007 at 03:55:24 +1300, Valery V. Sedletski wrote: > >>> 2) Must all the segment registers be CS == DS == ES == FS == GS == SS == FLAT in L4 usermode > >programs (in Intel > >>> architecture implementation)? Or, there exist a possibility to use segments other than FLAT? > >>> > >>Fiasco preserves some of these segments (e.g., GS to support thread > >>local storage). However, unless OS/2 makes use of these segments in > >>32-bit mode there is no need to change these from a flat setting. > > > >It seems, that OS/2 does not use GS (GS seems to be always == 0), at least, in application programs. > > > > But also FS is used to address a structure named Thread Info Block > (TIB), it is also not flat (it has a limit=0x30) So, FS is used by > OS/2 and programs depend on it. GS seems to be not used, and ES and DS > are generally flat. Fiasco makes some GDT slots available to userland so that FS and GS can be used with those. Adam -- Adam [email protected] Lackorzynski http://os.inf.tu-dresden.de/~adam/