Re: some question about access I/O memory in Pistachio

Espen Skoglund <[email protected]>
Newsgroups gmane.comp.micro-kernel.l4.l4ka.general
Message-ID <[email protected]>
Sigma0 (or any task for that matter) can not in general access the
upper 1GB of its virtual address space.  However, sigma0 can *map* any
part of its upper 1GB of address space (physical address space) to
anyone.  What you need to do is to have some task (e.g., the root
task) to request the apropriate physical page from sigma0 (at address
0xdef40f00 in your case) to be mapped into somewhere in the lower 3GB
address region (see user/include/l4/sigma0.h).  The physical memory
can then be accessed at whichever address you chose to have it mapped
into.

	eSk
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