Re: some question about access I/O memory in Pistachio

Hi,Espen Skoglund！

	Thanks for your suggestion and I have solved the problem now.

    However I have another confusion that I want to get some help form you or others.
    I created two threads which requested the physical page from sigma0(at address 0xdef40f00) respectively. As the l4-x2 manual says "Sigma0 responds with a map reject message if the page is reserved (i.e., kernel space) or already mapped to a different thread, or if memory is exhausted". I thought one of these threads would get a nilfpage. The fact were both of  them got the fpage successlly. With the same code, I change the address from 0xdef40f00 to 0x06400000, and the test result was consitent to what the l4-x2 manual.

    Is there any difference when Sigma0 handles the address region in upper 1GB and lower 3GB address?

======= 2007-12-05 00:35:21 您在来信中写道：=======

>Sigma0 (or any task for that matter) can not in general access the
>upper 1GB of its virtual address space.  However, sigma0 can *map* any
>part of its upper 1GB of address space (physical address space) to
>anyone.  What you need to do is to have some task (e.g., the root
>task) to request the apropriate physical page from sigma0 (at address
>0xdef40f00 in your case) to be mapped into somewhere in the lower 3GB
>address region (see user/include/l4/sigma0.h).  The physical memory
>can then be accessed at whichever address you chose to have it mapped
>into.
>
>	eSk
>
>

= = = = = = = = = = = = = = = = = = = =
			
thanks

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　　　　　　　　　　2007-12-05