RE: DMA related cache coherency issues

> -----Original Message-----
> From: [email protected] [mailto:[email protected]
> karlsruhe.de] On Behalf Of Sebastian Gregorzyk
> Subject: DMA related cache coherency issues
> 
> and always fetches invalid values. So I suppose reads from memory are
> cached
> and somehow don't get invalidated once changes are made. I tried to
> force
> the invalidation of the cache prior to every read, but that didn't
> work.

It's probably because reading memory from within the kernel debugger is
based on a remap window with cacheable entries. You can change
space_t::readmem_phys() to insert non-cacheable entries. Maybe it even makes
sense to do that by default.

> 
> So basically what I want is this:
> 
> - Chose a physical memory page designated to exchange data between
> CPU and OHCI.
> - Map said page to kernel and user address spaces (without caching).
> 
> The purpose is to get some basic debug I/O on systems that lack any
> kind legacy ports (serial/vga/i8042...) like EFI/x86 based Macs.

If you only need that for establishing a debug console, I don't really see
why you would want to have user access. KDB offers basic printing methods
(putc, print_string, getc, ...) which are routed to the currently active
console. So you could just add another console type in addition to serial
and screen, establish you OHCI mapping uncacheable using
space_t::add_mapping(), and then let the KDB driver do all the low-level
interfacing. 

-Jan

--
Jan Stoess
System Architecture Group
University of Karlsruhe
Phone: +49 (721) 608-4056 
Fax: +49 (721) 608-7664 
eMail: [email protected]