Re: Initial value support

On 6/5/2015 6:38 AM, Henry Gomersall wrote:
> What is current status of the initial value support? My understanding is
> that the code is there but comes caveat emptor.
>
> Certainly, in the Xilinx FPGA world, initial values seem to be the
> preferred strategy:
> http://www.xilinx.com/support/documentation/white_papers/wp272.pdf
>
> (though I appreciate that ASICs are not like that).

Yes, there is code that can be enable for initial value
support (IVS).  At one point XST actually failed on IVS.

Before enabling we wanted to do our due-diligence and
verify most major tools supported:

http://dev.myhdl.org/tasks/initial-values-support.html
http://dev.myhdl.org/ideas/initial-values.html

Creating an issue request IVS to be enabled is probably
a reasonable path forward (or a PR enabling it).

Inevitably, IVS also morphs into RAM initialization
support (RIS), which is less consistent between
languages and vendors.  We should not try and include
RIS when enabling IVS.

Regards,
Chris




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