Re: Thanks for MyHDL & PLL's

Edward Vidal <[email protected]> Thu, 25 Feb 2016 23:54:10 +0000 (UTC)
Newsgroups gmane.comp.python.myhdl
Message-ID <[email protected]>
Hi All
I too have been working with C. Felton and Dave Vandenbout https://hackaday.io/project/7982-cat-board

who developed the CAT-Board for the Raspberry Pi.  

Some of the things work okay with the yosys-tools. 

 My RPi2B with CatBoard are running in my home.
http://99.184.183.104/video.webm  The Catboard was program with the yosys tools.

For my catboard_blinky_host I had to use iCECube2 from Lattice.
This use C. Felton rhea and myhdl to generate the verilog code.

https://github.com/develone/jpeg-2000-test/blob/master/pc_fast_blinker_jpeg/input_examples/catboard_blinky_host.py

One of the things that I find really great is myhdl simulation.
python test_catboard_blinky_host.py --trace & python test_catboard_blinky_host.py --build
 wc iceriver/catboard.v
 1221  3131 35222 iceriver/catboard.v
If you have any question let me know. 

Regards,
Edward Vidal Jr. e-mail [email protected] 915-595-1613 

    On Thursday, February 25, 2016 3:46 PM, Mr C Camacho <[email protected]> wrote:
 

 yeah the icestorm tools are sweet, programming just the cram is a nice 
option and blisteringly fast :)

the combination of MyHDL and icestorm is nice...

mind I have noticed some oddities for example comparing list/tuple intbv 
elements with a intbv is still defeating me... I guess I'm still trying 
to get my head round the subtleties !

On 25/02/16 22:39, Jan Coombs wrote:
> On Thu, 25 Feb 2016 21:03:22 +0000
> Mr C Camacho <[email protected]> wrote:
>
>> Don't suppose you've got a saner example of including a
>> verilog module within a MyHDL do you? it's either way less
>> complex than it looks or I'm missing something here!
> I have wrapped Lattice library components to make them simulate
> or export for synthesis.
>
> The smallest wrapper I have is for a Lattice XO2 internal osc
> - 47 lines.
>
> Have also an iCE40 SB_RAM256X16.py with initialization, which I
> have used.
>
> I also started wrapping everything from the iCE40 primitive
> library, thinking I might ignore the synthesis tool and do it all
> in MyHDL, but most of this is untested.
>
> Have you noticed that the icestorm tools can program an iCE40
> part in just 2s?
>
> Let me know if you'd like anything emailed.
>
> Jan Coombs.


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