Re: GSoC'16 | JPEG Encoder
Henry Gomersall <[email protected]> Wed, 2 Mar 2016 22:01:38 +0000
| Newsgroups | gmane.comp.python.myhdl |
|---|---|
| Message-ID | <[email protected]> |
On 02/03/16 21:37, Martin Strubel wrote: > Hi, >> > >> > What do you mean my VLIW microcode? Why does it need to be VL? >> > > It's like the parallel instructions for some DSPs like the Intel Micro > Signal Architecture (Blackfin). To avoid extra decoding stages, the > opcodes just turned out simplest as "VLIW". Snippet: > > # LD SELB VADD PERM MODE ST > ( 0, 1, 1, 3, MODE_ASAA, 0, ), #0: > ( 3, 0, 1, 3, MODE_ASAA, 2, ), #1: > ... > > For example, portions of a long opcode control the different stage > switches of the pipeline (whether you do just a mul, a mac or de-mac). Ah that makes sense - it's essentially a concatenation of the control signals. Henry ------------------------------------------------------------------------------ Site24x7 APM Insight: Get Deep Visibility into Application Performance APM + Mobile APM + RUM: Monitor 3 App instances at just $35/Month Monitor end-to-end web transactions and take corrective actions now Troubleshoot faster and improve end-user experience. Signup Now! http://pubads.g.doubleclick.net/gampad/clk?id=272487151&iu=/4140