Re: Writing .cpu file for Z80
"Frank Ch. Eigler" <[email protected]> Sat, 22 Feb 2020 10:11:31 -0500
| Newsgroups | gmane.comp.tools.cgen.devel |
|---|---|
| Message-ID | <[email protected]> |
Hi - > The Z80 CPU uses prefix opcodes to change opcode tables and operation > registers. For example, <0x21 0x34 0x12> is "LD HL,0x1234", but <0xdd 0x21 > 0x34 0x12> is "LD IX,0x1234". Do I need write both instructions or is it > possible to write rule which selects proper instruction set or extract > correct register index? Consider writing prefix opcodes as a normal part of the instruction (so include them in the base-insn-bitsize). So you'd need two separate instructions, one with and one without. You may be able to use cgen macros to generate both flavours from one piece of declaration. > Z80 has special rule to form indirect memory operations using index > registers. There immediate offset is always third byte of instruction. For > example: <0xdd 0x34 0x12> is "INC (IX+0x12)", <0xfd 0x36 0xfe 0xab> is "LD > (IY-0x02),0xAB"... But there are "strange" instructions, where index is > placed before opcode itself: <0xdd 0xcb 0x10 0x1e> is "RR (IX+0x10)" (<0xcb > 0x1e> is "RR (HL)", <0xcb> is opcode prefix, which select another opcode > table) and undocumented one <0xdd 0xcb 0x10 0x1f> "RR (IX+0x10),A". Should > I write 2 instructions types? Probably, if the same operands are not in the same place. > eZ80 uses four opcode prefixes (.SIS, .SIL, .LIS, .LIL) which set operation > mode (.IL - long instruction (24 bit immediate), .IS - short instruction > (16 bit immediate), .S - 16 bit processing, .L - 24 bit processing): <0x40 > 0x21 0x34 0x12> is "LD.SIS HL,0x1234" and <0x5b 0x21 0x56 0x34 0x12> is > "LD.LIL HL,0x123456". These prefixes can be applied to all instructions > (but it has no sense for part of instructions). Moreover, assembler should > support short mode of instructions (.S, .L, .IS, .IL), which is completed > by assembler depending on compiling mode (ADL or Z80). Should I generate > all possible combinations (9 x instruction_set)? Is there more correct > solution? You may be able to represent tehse opcode prefix bytes as an operand, and have a special asm parser/printer that sets them from the .SIS etc mnemonic suffix. Or you can go brute-force and generate the family of 9 (!) instructions with a cgen macro. (There may be other ways too.) - FChE