Re: BUG: non-fixed-length ISAs are unsupported for now

Hi,

Can anybody help me, how to correctly implement Zilog Z80 (and
derivatives) instruction decode table switching in CGEN? For example,
the main table has 1 byte instruction and possibly 1-2 bytes of
immediate operand. There are four (ez80 has eight) pseudo instructions
which switches tables for current instruction:
* 0xCB - next byte is rotation or bit manipulation instruction code,
no optional operands;
* 0xED - next byte is instruction of extended instruction set,
possible 1-2 bytes of immediate operand;
* 0xDD/0xFD - switches use of H, L and HL registers to IX/IY on main
and 0xCB tables (here is difficult, because always added immediate
before instruction code: 0xDD 0xCB 0x07 0x3E - "srl (ix+7)").
I think, it should be done in following way:
* it is need to create 5 ISAs: isa_00, isa_cb, isa_ed, isa_ii_00, isa_ii_cb
* opcodes 0xCB, 0xDD, 0xED, 0xFD just switches ISA for current instruction
* <I do not know what I need to do for assembler support, how to parse
by all tables>

Best regards,
Sergey Belyashov