Re: BUG: non-fixed-length ISAs are unsupported for now

Hi -

> Can anybody help me, how to correctly implement Zilog Z80 (and
> derivatives) [...]

OK.  I have no fresh wisdom on this, but:

> * 0xCB - next byte is rotation or bit manipulation instruction code,
> no optional operands;
> * 0xED - next byte is instruction of extended instruction set,
> possible 1-2 bytes of immediate operand;
> * 0xDD/0xFD - switches use of H, L and HL registers to IX/IY on main
> and 0xCB tables (here is difficult, because always added immediate
> before instruction code: 0xDD 0xCB 0x07 0x3E - "srl (ix+7)").

.... these sound like they could fit into a single isa.  You could
have a family of ifields, one set for each of these prefix
combinations.  (Many could have different names and bit offsets but be
otherwise the same.)  Then for each instruction, you would have a set
of separate define-instruction's for each prefix combination (!),
using the corresponding ifields.  Ideally, use a cgen macro to
generate the separate define-instructions, to factor out the
commonalities.


> * <I do not know what I need to do for assembler support, how to parse
> by all tables>

I believe keeping it all in one ISA should make assembler / simulator
support rather easier. 


- FChE