Re: BUG: non-fixed-length ISAs are unsupported for now

Hi,

Thank you for your response.

> .... these sound like they could fit into a single isa.  You could
> have a family of ifields, one set for each of these prefix
> combinations.  (Many could have different names and bit offsets but be
> otherwise the same.)  Then for each instruction, you would have a set
> of separate define-instruction's for each prefix combination (!),
> using the corresponding ifields.  Ideally, use a cgen macro to
> generate the separate define-instructions, to factor out the
> commonalities.

I have already tried to stay within one ISA but my attempt fails. You
may look here for full source of my try:
https://github.com/b-s-a/binutils-gdb/blob/z80-cgen/cpu/z80.cpu
(invalid decoder is generated for last 2 lines - "reti" (ED 4D) and
"retn" (ED 45) instructions, I have tried many types of ifields with
same result, but these are simpler to read). I cannot understand what
I'm doing wrong.

Best regards,
Sergey Belyashov