Re: BUG: non-fixed-length ISAs are unsupported for now

>> But Zilog eZ80 CPU has instructions up to 6 bytes long: like ld.il bc,(Mmn)
>> (lil/sil prefix 0xed prefix <opcode> <n> <m> <M>) .
>
> You don't have to include pure operands in those 6.  Just the
> opcode-containing bytes that tell cgen-level instructions apart.

Yeah, just make sure that every (f-FOO CST) expression in instruction
formats (+ ... ) are contained in the base-insn.

Instruction operands can appear beyond the base insn without problems.