drm: Branch 'master' - 3 commits
[email protected] (Rodrigo Vivi) Thu, 29 Jun 2017 17:54:16 +0000 (UTC)
| Newsgroups | gmane.comp.video.dri.patches |
|---|---|
| Message-ID | <[email protected]> |
intel/intel_chipset.h | 33 ++++++++++++++++++++++++++++++++- 1 file changed, 32 insertions(+), 1 deletion(-) New commits: commit 4c98652cb5cd3b0ef3681b1a7b2892c14b7f5c34 Author: Anusha Srivatsa <[email protected]> Date: Wed Jun 21 11:17:37 2017 -0700 intel: PCI Ids for U SKU in CFL Add the PCI IDs for U SKU IN CFL by following the spec. v2: Update IDs Cc: Rodrigo Vivi <[email protected]> Signed-off-by: Anusha Srivatsa <[email protected]> Reviewed-by: Clinton Taylor <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h index fed5a0d8..891b50fc 100644 --- a/intel/intel_chipset.h +++ b/intel/intel_chipset.h @@ -228,6 +228,10 @@ #define PCI_CHIP_COFFEELAKE_S_GT2_3 0x3E96 #define PCI_CHIP_COFFEELAKE_H_GT2_1 0x3E9B #define PCI_CHIP_COFFEELAKE_H_GT2_2 0x3E94 +#define PCI_CHIP_COFFEELAKE_U_GT3_1 0x3EA5 +#define PCI_CHIP_COFFEELAKE_U_GT3_2 0x3EA6 +#define PCI_CHIP_COFFEELAKE_U_GT3_3 0x3EA7 +#define PCI_CHIP_COFFEELAKE_U_GT3_4 0x3EA8 #define IS_MOBILE(devid) ((devid) == PCI_CHIP_I855_GM || \ (devid) == PCI_CHIP_I915_GM || \ @@ -469,8 +473,14 @@ #define IS_CFL_H(devid) ((devid) == PCI_CHIP_COFFEELAKE_H_GT2_1 || \ (devid) == PCI_CHIP_COFFEELAKE_H_GT2_2) +#define IS_CFL_U(devid) ((devid) == PCI_CHIP_COFFEELAKE_U_GT3_1 || \ + (devid) == PCI_CHIP_COFFEELAKE_U_GT3_2 || \ + (devid) == PCI_CHIP_COFFEELAKE_U_GT3_3 || \ + (devid) == PCI_CHIP_COFFEELAKE_U_GT3_4) + #define IS_COFFEELAKE(devid) (IS_CFL_S(devid) || \ - IS_CFL_H(devid)) + IS_CFL_H(devid) || \ + IS_CFL_U(devid)) #define IS_GEN9(devid) (IS_SKYLAKE(devid) || \ IS_BROXTON(devid) || \ commit 2b48faf30e03cdafccffd7d6c6a715c2f969fc31 Author: Anusha Srivatsa <[email protected]> Date: Wed Jun 21 11:17:36 2017 -0700 intel: PCI Ids for H SKU in CFL Add the PCI IDs for H SKU IN CFL by following the spec. v2: Update IDs Cc: Rodrigo Vivi <[email protected]> Signed-off-by: Anusha Srivatsa <[email protected]> Reviewed-by: Clinton Taylor <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h index aeb72ba5..fed5a0d8 100644 --- a/intel/intel_chipset.h +++ b/intel/intel_chipset.h @@ -226,6 +226,8 @@ #define PCI_CHIP_COFFEELAKE_S_GT2_1 0x3E91 #define PCI_CHIP_COFFEELAKE_S_GT2_2 0x3E92 #define PCI_CHIP_COFFEELAKE_S_GT2_3 0x3E96 +#define PCI_CHIP_COFFEELAKE_H_GT2_1 0x3E9B +#define PCI_CHIP_COFFEELAKE_H_GT2_2 0x3E94 #define IS_MOBILE(devid) ((devid) == PCI_CHIP_I855_GM || \ (devid) == PCI_CHIP_I915_GM || \ @@ -464,7 +466,11 @@ (devid) == PCI_CHIP_COFFEELAKE_S_GT2_2 || \ (devid) == PCI_CHIP_COFFEELAKE_S_GT2_3) -#define IS_COFFEELAKE(devid) (IS_CFL_S(devid)) +#define IS_CFL_H(devid) ((devid) == PCI_CHIP_COFFEELAKE_H_GT2_1 || \ + (devid) == PCI_CHIP_COFFEELAKE_H_GT2_2) + +#define IS_COFFEELAKE(devid) (IS_CFL_S(devid) || \ + IS_CFL_H(devid)) #define IS_GEN9(devid) (IS_SKYLAKE(devid) || \ IS_BROXTON(devid) || \ commit 0733f376ae93f7580be1641d8ebc644561d438f4 Author: Anusha Srivatsa <[email protected]> Date: Wed Jun 21 11:17:35 2017 -0700 intel: PCI Ids for S SKU in CFL Add the PCI IDs for S SKU IN CFL by following the spec. v2: Update IDs. Cc: Rodrigo Vivi <[email protected]> Signed-off-by: Anusha Srivatsa <[email protected]> Reviewed-by: Clinton Taylor <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h index 41fc0da0..aeb72ba5 100644 --- a/intel/intel_chipset.h +++ b/intel/intel_chipset.h @@ -221,6 +221,12 @@ #define PCI_CHIP_GLK 0x3184 #define PCI_CHIP_GLK_2X6 0x3185 +#define PCI_CHIP_COFFEELAKE_S_GT1_1 0x3E90 +#define PCI_CHIP_COFFEELAKE_S_GT1_2 0x3E93 +#define PCI_CHIP_COFFEELAKE_S_GT2_1 0x3E91 +#define PCI_CHIP_COFFEELAKE_S_GT2_2 0x3E92 +#define PCI_CHIP_COFFEELAKE_S_GT2_3 0x3E96 + #define IS_MOBILE(devid) ((devid) == PCI_CHIP_I855_GM || \ (devid) == PCI_CHIP_I915_GM || \ (devid) == PCI_CHIP_I945_GM || \ @@ -452,10 +458,19 @@ #define IS_GEMINILAKE(devid) ((devid) == PCI_CHIP_GLK || \ (devid) == PCI_CHIP_GLK_2X6) +#define IS_CFL_S(devid) ((devid) == PCI_CHIP_COFFEELAKE_S_GT1_1 || \ + (devid) == PCI_CHIP_COFFEELAKE_S_GT1_2 || \ + (devid) == PCI_CHIP_COFFEELAKE_S_GT2_1 || \ + (devid) == PCI_CHIP_COFFEELAKE_S_GT2_2 || \ + (devid) == PCI_CHIP_COFFEELAKE_S_GT2_3) + +#define IS_COFFEELAKE(devid) (IS_CFL_S(devid)) + #define IS_GEN9(devid) (IS_SKYLAKE(devid) || \ IS_BROXTON(devid) || \ IS_KABYLAKE(devid) || \ - IS_GEMINILAKE(devid)) + IS_GEMINILAKE(devid) || \ + IS_COFFEELAKE(devid)) #define IS_9XX(dev) (IS_GEN3(dev) || \ IS_GEN4(dev) || \ ------------------------------------------------------------------------------ Check out the vibrant tech community on one of the world's most engaging tech sites, Slashdot.org! http://sdm.link/slashdot --