drm: Branch 'master' - 4 commits

 intel/intel_bufmgr_gem.c |    2 ++
 intel/intel_chipset.h    |   30 +++++++++++++++++++++++++++++-
 intel/intel_decode.c     |    4 +++-
 3 files changed, 34 insertions(+), 2 deletions(-)

New commits:
commit 3095cc8eaba1aa87ad38c04ae2b1eabe30f7e16c
Author: Paulo Zanoni <[email protected]>
Date:   Thu Apr 27 17:11:09 2017 -0300

    intel: add GEN10 to IS_9XX.
    
    As far as I understand, IS_9XX should return true for it.
    
    Signed-off-by: Paulo Zanoni <[email protected]>
    Signed-off-by: Rodrigo Vivi <[email protected]>

diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h
index 37579c64..770d21f0 100644
--- a/intel/intel_chipset.h
+++ b/intel/intel_chipset.h
@@ -505,7 +505,8 @@
 				 IS_GEN6(dev) || \
 				 IS_GEN7(dev) || \
 				 IS_GEN8(dev) || \
-				 IS_GEN9(dev))
+				 IS_GEN9(dev) || \
+				 IS_GEN10(dev))
 
 #define IS_CNL_Y(devid)		((devid) == PCI_CHIP_CANNONLAKE_Y_GT2_0 || \
 				 (devid) == PCI_CHIP_CANNONLAKE_Y_GT2_1 || \
commit 5c490bd6854a5b265aaa62ef62926c3ac97092c7
Author: Ben Widawsky <[email protected]>
Date:   Wed Aug 24 14:51:43 2016 -0700

    intel/gen10: Add missed gen10 stuff
    
    This got lost on rebase, I believe
    
    Signed-off-by: Ben Widawsky <[email protected]>
    Signed-off-by: Rodrigo Vivi <[email protected]>

diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
index 45a26da1..71f140f5 100644
--- a/intel/intel_bufmgr_gem.c
+++ b/intel/intel_bufmgr_gem.c
@@ -3662,6 +3662,8 @@ drm_intel_bufmgr_gem_init(int fd, int batch_size)
 		bufmgr_gem->gen = 8;
 	else if (IS_GEN9(bufmgr_gem->pci_device))
 		bufmgr_gem->gen = 9;
+	else if (IS_GEN10(bufmgr_gem->pci_device))
+		bufmgr_gem->gen = 10;
 	else {
 		free(bufmgr_gem);
 		bufmgr_gem = NULL;
diff --git a/intel/intel_decode.c b/intel/intel_decode.c
index 2721ffd7..3a81500f 100644
--- a/intel/intel_decode.c
+++ b/intel/intel_decode.c
@@ -3827,7 +3827,9 @@ drm_intel_decode_context_alloc(uint32_t devid)
 	ctx->devid = devid;
 	ctx->out = stdout;
 
-	if (IS_GEN9(devid))
+	if (IS_GEN10(devid))
+		ctx->gen = 10;
+	else if (IS_GEN9(devid))
 		ctx->gen = 9;
 	else if (IS_GEN8(devid))
 		ctx->gen = 8;
commit 80201d706712bd87f1bac8b7493bd784acd4a764
Author: Rodrigo Vivi <[email protected]>
Date:   Mon Dec 12 16:06:03 2016 -0800

    intel: Add Cannonlake PCI IDs for Y-skus.
    
    By the Spec all CNL Y skus are 2+2, i.e. GT2.
    
    This is a copy of merged i915's
    commit 95578277cbdb ("drm/i915/cnl: Add Cannonlake PCI IDs for Y-skus.")
    
    v2: Add kernel commit id for reference.
    
    Cc: Anusha Srivatsa <[email protected]>
    Cc: Clinton Taylor <[email protected]>
    Signed-off-by: Rodrigo Vivi <[email protected]>
    Reviewed-by: Clinton Taylor <[email protected]>

diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h
index e6b49d73..37579c64 100644
--- a/intel/intel_chipset.h
+++ b/intel/intel_chipset.h
@@ -237,6 +237,12 @@
 #define PCI_CHIP_CANNONLAKE_U_GT2_1	0x5A5A
 #define PCI_CHIP_CANNONLAKE_U_GT2_2	0x5A42
 #define PCI_CHIP_CANNONLAKE_U_GT2_3	0x5A4A
+#define PCI_CHIP_CANNONLAKE_Y_GT2_0	0x5A51
+#define PCI_CHIP_CANNONLAKE_Y_GT2_1	0x5A59
+#define PCI_CHIP_CANNONLAKE_Y_GT2_2	0x5A41
+#define PCI_CHIP_CANNONLAKE_Y_GT2_3	0x5A49
+#define PCI_CHIP_CANNONLAKE_Y_GT2_4	0x5A71
+#define PCI_CHIP_CANNONLAKE_Y_GT2_5	0x5A79
 
 #define IS_MOBILE(devid)	((devid) == PCI_CHIP_I855_GM || \
 				 (devid) == PCI_CHIP_I915_GM || \
@@ -501,12 +507,20 @@
 				 IS_GEN8(dev) || \
 				 IS_GEN9(dev))
 
+#define IS_CNL_Y(devid)		((devid) == PCI_CHIP_CANNONLAKE_Y_GT2_0 || \
+				 (devid) == PCI_CHIP_CANNONLAKE_Y_GT2_1 || \
+				 (devid) == PCI_CHIP_CANNONLAKE_Y_GT2_2 || \
+				 (devid) == PCI_CHIP_CANNONLAKE_Y_GT2_3 || \
+				 (devid) == PCI_CHIP_CANNONLAKE_Y_GT2_4 || \
+				 (devid) == PCI_CHIP_CANNONLAKE_Y_GT2_5)
+
 #define IS_CNL_U(devid)		((devid) == PCI_CHIP_CANNONLAKE_U_GT2_0 || \
 				 (devid) == PCI_CHIP_CANNONLAKE_U_GT2_1 || \
 				 (devid) == PCI_CHIP_CANNONLAKE_U_GT2_2 || \
 				 (devid) == PCI_CHIP_CANNONLAKE_U_GT2_3)
 
-#define IS_CANNONLAKE(devid)	(IS_CNL_U(devid))
+#define IS_CANNONLAKE(devid)	(IS_CNL_U(devid) || \
+				 IS_CNL_Y(devid))
 
 #define IS_GEN10(devid)		(IS_CANNONLAKE(devid))
 
commit 6b624bf3c394e1883314925c65c7ed1e98f3639f
Author: Rodrigo Vivi <[email protected]>
Date:   Mon Dec 12 16:06:02 2016 -0800

    intel: Add Cannonlake PCI IDs for U-skus.
    
    Platform enabling and its power-on are organized in different
    skus (U x Y x S x H, etc). So instead of organizing it in
    GT1 x GT2 x GT3 let's also use the platform sku.
    
    This is a copy of merged i915's
    commit e918d79a5d0a ("drm/i915/cnl: Add Cannonlake PCI IDs for U-skus.")
    
    v2: Remove PCI IDs for SKU not mentioned in spec.
    v3: Add kernel commit id for reference.
    
    Cc: Anusha Srivatsa <[email protected]>
    Cc: Clinton Taylor <[email protected]>
    Signed-off-by: Rodrigo Vivi <[email protected]>
    Reviewed-by: Clinton Taylor <[email protected]>

diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h
index 891b50fc..e6b49d73 100644
--- a/intel/intel_chipset.h
+++ b/intel/intel_chipset.h
@@ -233,6 +233,11 @@
 #define PCI_CHIP_COFFEELAKE_U_GT3_3     0x3EA7
 #define PCI_CHIP_COFFEELAKE_U_GT3_4     0x3EA8
 
+#define PCI_CHIP_CANNONLAKE_U_GT2_0	0x5A52
+#define PCI_CHIP_CANNONLAKE_U_GT2_1	0x5A5A
+#define PCI_CHIP_CANNONLAKE_U_GT2_2	0x5A42
+#define PCI_CHIP_CANNONLAKE_U_GT2_3	0x5A4A
+
 #define IS_MOBILE(devid)	((devid) == PCI_CHIP_I855_GM || \
 				 (devid) == PCI_CHIP_I915_GM || \
 				 (devid) == PCI_CHIP_I945_GM || \
@@ -496,5 +501,13 @@
 				 IS_GEN8(dev) || \
 				 IS_GEN9(dev))
 
+#define IS_CNL_U(devid)		((devid) == PCI_CHIP_CANNONLAKE_U_GT2_0 || \
+				 (devid) == PCI_CHIP_CANNONLAKE_U_GT2_1 || \
+				 (devid) == PCI_CHIP_CANNONLAKE_U_GT2_2 || \
+				 (devid) == PCI_CHIP_CANNONLAKE_U_GT2_3)
+
+#define IS_CANNONLAKE(devid)	(IS_CNL_U(devid))
+
+#define IS_GEN10(devid)		(IS_CANNONLAKE(devid))
 
 #endif /* _INTEL_CHIPSET_H */

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