Re: Visual artifacts on radeon 9500 dri
Alex Jackson <[email protected]> Thu, 20 Mar 2008 01:41:47 -0400
| Newsgroups | gmane.comp.video.dri.user |
|---|---|
| Message-ID | <[email protected]> |
--===============1187116071== Content-Type: multipart/alternative; boundary="_4dcc4ffe-8cee-4718-bc9d-cdfbf35b5e17_" --_4dcc4ffe-8cee-4718-bc9d-cdfbf35b5e17_ Content-Type: text/plain; charset="Windows-1252" Content-Transfer-Encoding: quoted-printable > Date: Wed, 19 Mar 2008 19:51:57 -0400 > From: [email protected] > To: [email protected] > Subject: Re: [Dri-users] Visual artifacts on radeon 9500 dri > CC: [email protected]; [email protected] >=20 > On Wed, Mar 19, 2008 at 7:29 PM, Alex Jackson <[email protected]> = wrote: > > Wouldn't it be better, now that we have those register docs, to get the > > number of working pipes from the card itself (specifically GB_PIPE_SELE= CT) > > rather than using a list of PCI ids? >=20 > Yes, I'm working on it :) > However, r3xx chips don't have GB_PIPE_SELECT. Only r4xx, rs4xx and r5xx= do. Yeah, I just looked at the newly-dropped R300 doc and noticed that there's = no sign of that register. I guess that's why the 9500s were easy to "softm= od" in Windows, and there's no choice for those cards but to use a list of = PCI IDs... According to the R500 doc, it looks like you can just set GB_PIPE_SELECT to= the maximum (16 pipes) on all R4xx and R5xx cards and the card will automa= tically correct it to the actual number of working pipes. Is this right or= am I misinterpreting the doc? I guess we'll want to query the card anyway for the real number of working = pipes when/if we start tweaking the bits in GB_TILE_CONFIG for performance = like the binary drivers (presumably) do. For example it looks like there's= a bit in that register that's specific to 12-pipe configurations, and sele= cts one of two ways of splitting the pixels between the three quads, any id= ea how that works? Is it something like [1][2] [3] versus [1] [2][3] ?? --AWJ-- _________________________________________________________________ Enter today for your chance to win $1000 a day=97today until May 12th. Lear= n more at SignInAndWIN.ca http://g.msn.ca/ca55/215= --_4dcc4ffe-8cee-4718-bc9d-cdfbf35b5e17_ Content-Type: text/html; charset="Windows-1252" Content-Transfer-Encoding: quoted-printable <html> <head> <style> .hmmessage P { margin:0px; padding:0px } body.hmmessage { FONT-SIZE: 10pt; FONT-FAMILY:Tahoma } </style> </head> <body class=3D'hmmessage'> > Date: Wed, 19 Mar 2008 19:51:57 -0400<br>> From: alexdeucher@gmail.= com<br>> To: [email protected]<br>> Subject: Re: [Dri-users] V= isual artifacts on radeon 9500 dri<br>> CC: [email protected]; dri-us= [email protected]<br>> <br>> On Wed, Mar 19, 2008 at 7:29 PM,= Alex Jackson <[email protected]> wrote:<br>> > Wouldn't= it be better, now that we have those register docs, to get the<br>> >= ; number of working pipes from the card itself (specifically GB_PIPE_SELECT= )<br>> > rather than using a list of PCI ids?<br>> <br>> Yes, I= 'm working on it :)<br>> However, r3xx chips don't have GB_PIPE_SELECT. = Only r4xx, rs4xx and r5xx do.<br><br>Yeah, I just looked at the newly-drop= ped R300 doc and noticed that there's no sign of that register. I gue= ss that's why the 9500s were easy to "softmod" in Windows, and there's no c= hoice for those cards but to use a list of PCI IDs...<br><br>According to t= he R500 doc, it looks like you can just set GB_PIPE_SELECT to the maximum (= 16 pipes) on all R4xx and R5xx cards and the card will automatically correc= t it to the actual number of working pipes. Is this right or am I mis= interpreting the doc?<br><br>I guess we'll want to query the card anyway fo= r the real number of working pipes when/if we start tweaking the bits in GB= _TILE_CONFIG for performance like the binary drivers (presumably) do. = For example it looks like there's a bit in that register that's specific t= o 12-pipe configurations, and selects one of two ways of splitting the pixe= ls between the three quads, any idea how that works? Is it something = like<br><br>[1][2]<br>[3]<br><br>versus<br><br> [1]<br>[2][3]<b= r><br>??<br><br>--AWJ--<br><br /><hr />Sign in to Windows Live Messenger, a= nd enter for your chance to win $1000 a day=97today until May 12th. <a href= =3D'http://g.msn.ca/ca55/210' target=3D'_new'>Visit SignInAndWIN.ca</a></bo= dy> </html>= --_4dcc4ffe-8cee-4718-bc9d-cdfbf35b5e17_-- --===============1187116071== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline ------------------------------------------------------------------------- This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse0120000070mrt/direct/01/ --===============1187116071== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline -- _______________________________________________ Dri-users mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/dri-users --===============1187116071==--