Position:Senior Engineer / Technical Leaders in Physical Design

"padmanaban" <[email protected]> Wed, 3 May 2006 16:36:06 +0530
Newsgroups gmane.comp.windows.ce.devel,gmane.comp.windows.ce.freeware
Message-ID <014801c66ea1$97128080$7d01a8c0@user123h7zo0hw>
The below is the critical requirement from our client www.agere.com

Position:  Senior Engineer / Technical Leaders in Physical Design

Educational Profile

Masters in Engineering/ Bachelors in Engineering from a reputed institute 
with good academic record (min 70%)

Experience:

3+ years of experience and should have executed P & R for large chip designs
Candidate must have relevant experience from a good company

Job profile:

Participate in the Block level Physical designs of size 300K to 2M Gate
Participate in BIST, STA and Timing Closure activities
Work with RTL designers closely in Timing closure
Complete the Block level Design including the Physical Design Verification
Participate in Chip Level Floor Planning and hierarchical design
Technology migration of layouts


Domain Knowledge:
VLSI Design flows(Back end),
High speed designs,
HDLs (Verilog/VHDL),
Physical design issues in DSM

Required skills (one or more) - Critical

Hands-on experience with back-end tools (Floorplaning and Place  & Route ) 
preferably using First Encounter and/ Astro
Clock tree synthesis
Back-end design flows from Synthesis to Physical design verification 
including various Scan and BIST methodologies (BIST using Logic Vision)
SoC back-end design
Physical design verification

Desirable Skills

Knowledge of scripting languages and programming languages.
RTL Coding
Knowledge of HDLs (Verilog/VHDL)
Desirable soft Skills
Good leadership skills and Good communication skills


Please interested are to send their updated cv with current,Expected CTC 
details.


Thanks and Regards
Padmanaban.G-Human Resources
Bridge Source Solutions India (P) Ltd.,
#551-9 A Main,1st Stage,Indira Nagar
Bangalore,India
Email: [email protected]
Mobile:+91 9880265999
URL: WWW.BRIDGESOURCE.NET