Re: [RFC PATCH] arm_mpam: remove sanity check of accessibility when error interrupt is SPI on SMT platforms
Ben Horgan <[email protected]> Tue, 28 Jul 2026 16:48:53 +0100
| Newsgroups | gmane.linux.kernel,gmane.linux.acpi.devel,gmane.linux.ports.arm.kernel |
|---|---|
| Message-ID | <[email protected]> |
Hi Yadong, On 7/20/26 08:24, Yadong Qi wrote: > On SMT platforms, an L2 cache MSC is typically shared between sibling > threads. Per the MPAM ACPI spec (DEN0065B), the MSC's linked device > should be set to the processor container of those siblings, so the > kernel derives msc->accessibility as just the sibling CPUs. > > Per the MPAM spec (IHI0099B), when an MSC is not integrated into a PE, > SPI/LPI is the recommended error interrupt. SPIs are not per-CPU, and a > sanity check in mpam_msc_setup_error_irq() requires accessibility == > cpu_possible_mask — assuming a shared interrupt must be routable to all > CPUs. This creates a conflict on SMT platforms: the MSC has a restricted > accessibility but a shared error interrupt, causing probe to fail with: > > msc:N is a private resource with a shared error interrupt > > This RFC patch removes the check to allow MSC probe to succeed on SMT > platforms, but this is mainly intended to start a discussion. We would > appreciate advice on the right way to handle this conflict. Is this a > spec issue, or should the driver handle SPI error interrupts differently For advice on questions broader than just linux please ask arm support: [email protected] > when an MSC has a restricted accessibility mask? I expect the MPAM driver could be taught to deal with SPI interrupts without global affinity. > > Signed-off-by: Yadong Qi <[email protected]> > --- > drivers/resctrl/mpam_devices.c | 7 ------- > 1 file changed, 7 deletions(-) > > diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c > index b69f99488111..e8b2b5e00d7c 100644 > --- a/drivers/resctrl/mpam_devices.c > +++ b/drivers/resctrl/mpam_devices.c > @@ -1964,13 +1964,6 @@ static int mpam_msc_setup_error_irq(struct mpam_msc *msc) > if (irq_is_percpu(irq)) > return __setup_ppi(msc); > > - /* sanity check: shared interrupts can be routed anywhere? */ > - if (!cpumask_equal(&msc->accessibility, cpu_possible_mask)) { > - pr_err_once("msc:%u is a private resource with a shared error interrupt", > - msc->id); > - return -EINVAL; > - } > - To do this the MPAM driver would have to remove the interrupt from balancing, IRQF_NOBALANCING, and control the balancing itself. Thanks, Ben > return 0; > } >