endianness issues across cpu , pci-bridge and NIC

"Ashish anand" <[email protected]> Thu, 10 Apr 2003 18:33:01 +0530
Newsgroups gmane.linux.drivers.eepro100.devel
Message-ID <[email protected]>
Hello,
folowing is the system configuration in terms of endianness.

1.cpu runs in big-endian mode.

2.byte swapping enabled at pci-bridge for both io and mem access.

3.in asm/io.h all the read's and write's use byte swapping before
operation.

now though i am able to read serial eeprom MAC address and self test
passses successfully , but card reports "transmit timed out" (i have
checked interrupt is well in place)

i doubt my code to handle endianness for passing pointers from driver
across card.
WHETHER BELOW CODE work for my system ( note the use of plain
virt_to_bus(x) and bus_to_virt(x) ,i was guessing adition cpu_to_le32
before bus_to virt call)

void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size,
                           dma_addr_t *dma_handle)
{
        void *ret;
        int gfp = GFP_ATOMIC;
        int order = get_order(size);
        if (hwdev == NULL || hwdev->dma_mask != 0xffffffff)
                gfp |= GFP_DMA;
        ret = (void *)__get_free_pages(gfp, order);
       if (ret != NULL) {
                memset(ret, 0, size);
                dma_cache_wback_inv(ret, PAGE_SIZE << order);
                ret = KSEG1ADDR(ret);   /* use uncached address */
                *dma_handle = virt_to_bus(ret);
        }

extern inline dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr,
                                        size_t size, int direction)
{
        if (direction == PCI_DMA_NONE)
                BUG();
        dma_cache_wback_inv((unsigned long)ptr, size);
        return virt_to_bus(ptr);
}
        return ret;
}

Best Regards,
Ashish Anand