MIPS: CPS: Fix MIPS_ISA_LEVEL_RAW fallout

"Linux Kernel Mailing List" <[email protected]>
Newsgroups gmane.linux.kernel.commits.head
Message-ID <[email protected]>
Web:        https://git.kernel.org/torvalds/c/8dbc1864b74f5dea5a3f7c30ca8fd358a675132f
Commit:     8dbc1864b74f5dea5a3f7c30ca8fd358a675132f
Parent:     d8a5b80568a9cb66810e75b182018e9edb68e8ff
Refname:    refs/heads/master
Author:     James Hogan <[email protected]>
AuthorDate: Fri Feb 2 14:36:40 2018 +0000
Committer:  James Hogan <[email protected]>
CommitDate: Mon Feb 5 11:53:06 2018 +0000

    MIPS: CPS: Fix MIPS_ISA_LEVEL_RAW fallout
    
    Commit 17278a91e04f ("MIPS: CPS: Fix r1 .set mt assembler warning")
    added .set MIPS_ISA_LEVEL_RAW to silence warnings about .set mt on r1,
    however this can result in a MOVE being encoded as a 64-bit DADDU
    instruction on certain version of binutils (e.g. 2.22), and reserved
    instruction exceptions at runtime on 32-bit hardware.
    
    Reduce the sizes of the push/pop sections to include only instructions
    that are part of the MT ASE or which won't convert to 64-bit
    instructions after .set mips64r2/mips64r6.
    
    Reported-by: Greg Ungerer <[email protected]>
    Fixes: 17278a91e04f ("MIPS: CPS: Fix r1 .set mt assembler warning")
    Signed-off-by: James Hogan <[email protected]>
    Cc: Ralf Baechle <[email protected]>
    Cc: Paul Burton <[email protected]>
    Cc: [email protected]
    Cc: <[email protected]> # 4.15
    Tested-by: Greg Ungerer <[email protected]>
    Patchwork: https://patchwork.linux-mips.org/patch/18578/
---
 arch/mips/kernel/cps-vec.S | 17 ++++++++++++-----
 1 file changed, 12 insertions(+), 5 deletions(-)

diff --git a/arch/mips/kernel/cps-vec.S b/arch/mips/kernel/cps-vec.S
index e68e6e04063a..1025f937ab0e 100644
--- a/arch/mips/kernel/cps-vec.S
+++ b/arch/mips/kernel/cps-vec.S
@@ -388,15 +388,16 @@ LEAF(mips_cps_boot_vpes)
 
 #elif defined(CONFIG_MIPS_MT)
 
-	.set	push
-	.set	MIPS_ISA_LEVEL_RAW
-	.set	mt
-
 	/* If the core doesn't support MT then return */
 	has_mt	t0, 5f
 
 	/* Enter VPE configuration state */
+	.set	push
+	.set	MIPS_ISA_LEVEL_RAW
+	.set	mt
 	dvpe
+	.set	pop
+
 	PTR_LA	t1, 1f
 	jr.hb	t1
 	 nop
@@ -422,6 +423,10 @@ LEAF(mips_cps_boot_vpes)
 	mtc0	t0, CP0_VPECONTROL
 	ehb
 
+	.set	push
+	.set	MIPS_ISA_LEVEL_RAW
+	.set	mt
+
 	/* Skip the VPE if its TC is not halted */
 	mftc0	t0, CP0_TCHALT
 	beqz	t0, 2f
@@ -495,6 +500,8 @@ LEAF(mips_cps_boot_vpes)
 	ehb
 	evpe
 
+	.set	pop
+
 	/* Check whether this VPE is meant to be running */
 	li	t0, 1
 	sll	t0, t0, a1
@@ -509,7 +516,7 @@ LEAF(mips_cps_boot_vpes)
 1:	jr.hb	t0
 	 nop
 
-2:	.set	pop
+2:
 
 #endif /* CONFIG_MIPS_MT_SMP */
 
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