Re: [PATCH] sh: boot: Remove sh5 cache handling
John Paul Adrian Glaubitz <[email protected]>
| Newsgroups | gmane.linux.ports.sh.devel |
|---|---|
| Message-ID | <09d677ad889a0bc2d7ae4324e0ca3e90d741b23b.camel@physik.fu-berlin.de> |
Hi Geert, On Mon, 2024-04-29 at 10:06 +0200, Geert Uytterhoeven wrote: > On Mon, Apr 29, 2024 at 9:52 AM John Paul Adrian Glaubitz > <[email protected]> wrote: > > > > Don't have the 32-bit SH CPUs any caches? The code itself is unconditionally executed, > > it seems. > > They do. E.g. SH7751 has 8+8 KiB of L1 cache. > But e.g. sh7724 has 32+32KiB L1 cache, and 256 KiB of unified L2 cache. > SH772[34] have l2_cache_init() to enable the L2 cache, so probably they > boot with L2 disabled, and we are fine. Understood. But what exactly was the job of cache_control() when all it does was flushing the cache area? The cache is not enabled or disabled here, is it? Also, I was wondering whether this could be related to the boot lockups that I am seeing on my SH-7786LCR which stops after printing "Uncompressing Linux...". I will test later this week whether your patch actually fixes this issue. > Unfortunately I don't have access to a SH772[34] system. > Sato-san: can you confirm? > Thanks! Yoshinari's input would indeed be valuable here. Adrian -- .''`. John Paul Adrian Glaubitz : :' : Debian Developer `. `' Physicist `- GPG: 62FF 8A75 84E0 2956 9546 0006 7426 3B37 F5B5 F913