Re: [PATCH] sh: boot: Remove sh5 cache handling
Geert Uytterhoeven <[email protected]>
| Newsgroups | gmane.linux.ports.sh.devel |
|---|---|
| Message-ID | <CAMuHMdWrzme7Nr400-fcsYQx9Pir38COKGGMjnQG3fcpTHt_bg@mail.gmail.com> |
Hi Adrian, On Mon, Apr 29, 2024 at 10:22 AM John Paul Adrian Glaubitz <[email protected]> wrote: > On Mon, 2024-04-29 at 10:06 +0200, Geert Uytterhoeven wrote: > > On Mon, Apr 29, 2024 at 9:52 AM John Paul Adrian Glaubitz > > <[email protected]> wrote: > > > > > > Don't have the 32-bit SH CPUs any caches? The code itself is unconditionally executed, > > > it seems. > > > > They do. E.g. SH7751 has 8+8 KiB of L1 cache. > > But e.g. sh7724 has 32+32KiB L1 cache, and 256 KiB of unified L2 cache. > > SH772[34] have l2_cache_init() to enable the L2 cache, so probably they > > boot with L2 disabled, and we are fine. > > Understood. But what exactly was the job of cache_control() when all it > does was flushing the cache area? The cache is not enabled or disabled I assume flushing the cache was needed to push all code written to RAM. > here, is it? No, it is not enabled or disabled. Probably that was planned for later, cfr. the command parameter. > Also, I was wondering whether this could be related to the boot lockups > that I am seeing on my SH-7786LCR which stops after printing "Uncompressing > Linux...". I doubt it, unless reading from 0x80000000 causes a lock-up... > I will test later this week whether your patch actually fixes this issue. ... in which case my patch will help ;-) Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected] In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds