Re: SMI tuning

Paolo Mantegazza <[email protected]> Tue, 27 Feb 2018 12:53:15 +0100
Newsgroups	gmane.linux.real-time.rtai
Message-ID	<[email protected]>
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The interacting interface, SMISPV, might be of further help. Have a look=20
also at the related READMEs.

Paolo

On 02/26/2018 06:33 PM, William Montgomery wrote:
> I am moving to a new hardware platform due to obsolescence issues and=20
> testing the latency with the kern/latency app shows some mostly=20
> 10-22usec ovl max but some occasional large spikes (2msec).=C2=A0 In th=
e=20
> past I have used rtai_smi module to fix this type problem and now I=20
> have added the new Intel SMI chipset but and unable to mask the SMI=20
> bits. This motherboard contains:
>
> Intel(R) Xeon(R) W-2133 CPU @ 3.60GHz -- Skylake
> Intel C422 chipset
>
> When I load the rtai_smi module, I see:
>
> [ 2386.756382] RTAI: Intel SMI chipset found (8086:a2d3), enabling SMI=20
> workaround.
> [ 2386.756409] Bits enabled: GBL_SMI, EOS (special), MCSMI, TCO,=20
> PERIODIC, LEGACY_USB2, INTEL_USB2.
> [ 2386.756411] Original SMI configuration value 0xffffff03 has been=20
> cleared with mask =3D 0x1 (saved mask setting 0x1), new value 0
> xffffff03.
> [ 2386.756413] Bits enabled: GBL_SMI, EOS (special), MCSMI, TCO,=20
> PERIODIC, LEGACY_USB2, INTEL_USB2.
>
> Does anyone have experience with these new chipsets?
>
> Regards,
> Wm
>
>
> _______________________________________________
> Rtai mailing list
> [email protected]
> https://mail.rtai.org/cgi-bin/mailman/listinfo/rtai



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    <div class=3D"moz-cite-prefix">The interacting interface, SMISPV,
      might be of further help. Have a look also at the related READMEs.<=
br>
      <br>
      Paolo<br>
      <br>
      On 02/26/2018 06:33 PM, William Montgomery wrote:<br>
    </div>
    <blockquote type=3D"cite"
cite=3D"mid:CAJ=3DbQAt6+=3Dbd8_91W4kd9GjKqTiWROJy4daT+jX4TVmpZjn=3DMg@mai=
l.gmail.com">
      <meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3Du=
tf-8">
      <div dir=3D"ltr">I am moving to a new hardware platform due to
        obsolescence issues and testing the latency with the
        kern/latency app shows some mostly 10-22usec ovl max but some
        occasional large spikes (2msec).=C2=A0 In the past I have used
        rtai_smi module to fix this type problem and now I have added
        the new Intel SMI chipset but and unable to mask the SMI bits.=C2=
=A0
        This motherboard contains:
        <div><br>
        </div>
        <div>Intel(R) Xeon(R) W-2133 CPU @ 3.60GHz -- Skylake<br>
        </div>
        <div>Intel C422 chipset</div>
        <div><br>
        </div>
        <div>When I load the rtai_smi module, I see:</div>
        <div><br>
        </div>
        <div>
          <div>[ 2386.756382] RTAI: Intel SMI chipset found (8086:a2d3),
            enabling SMI workaround.</div>
          <div>[ 2386.756409] Bits enabled: GBL_SMI, EOS (special),
            MCSMI, TCO, PERIODIC, LEGACY_USB2, INTEL_USB2.</div>
          <div>[ 2386.756411] Original SMI configuration value
            0xffffff03 has been cleared with mask =3D 0x1 (saved mask
            setting 0x1), new value 0</div>
          <div>xffffff03.</div>
          <div>[ 2386.756413] Bits enabled: GBL_SMI, EOS (special),
            MCSMI, TCO, PERIODIC, LEGACY_USB2, INTEL_USB2.</div>
        </div>
        <div><br>
        </div>
        <div>Does anyone have experience with these new chipsets?</div>
        <div><br>
        </div>
        <div>Regards,</div>
        <div>Wm</div>
      </div>
      <br>
      <fieldset class=3D"mimeAttachmentHeader"></fieldset>
      <br>
      <pre wrap=3D"">_______________________________________________
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rtai.org</a>
<a class=3D"moz-txt-link-freetext" href=3D"https://mail.rtai.org/cgi-bin/=
mailman/listinfo/rtai">https://mail.rtai.org/cgi-bin/mailman/listinfo/rta=
i</a></pre>
    </blockquote>
    <p><br>
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