RE: Bigphysarea and mbuff

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________________________________

From: [email protected] on behalf of [email protected]
Sent: Wed 8/2/2006 11:27 AM
To: [email protected]
Subject: RE: [Rtl] Bigphysarea and mbuff




>> I haven't used mbuff but use bigphysearea a lot to share data between =
rtl
>> and user land.  One issue I had to work through was makeing sure that =
the
>> memory was marked non-cached to ensure different threads were =
actually
>> reading/writing data to memory.

>> How did you do that?  Using /proc/mtrr?
Sorry, I don't have access to the source code for that system and it's =
been a couple of years.


> I thought cache issues only matter if you are doing DMA with hardware
> or if you are on an SMP system.  I assumed the CPU has sanity with =
respect
> to itself and its own cache.
I was using an SMP system and DMA from hardware.  I was seeing the =
issues between threads that could have been running on different =
processors. =20


> Also you may just want to use the volatile keyword -- are you sure =
your
> problems were not compiler optimization related rather than cache =
related?
> Do enlighten me since I need to know about potential bugs in my own =
code
> and if I do need to use MTRR I want advice..
Yup.  Know all about volatile and was bitten a lot in my earlier days.  =
Definitely not compiler issues as it changed depending on processor =
loading.  Flaging the memory as non-cached fixed the problem.  Just =
thought I would throw this out as something you might think about.


> Thanks,

> -Calin


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