Re: Fwd: AMD x2 chips

Mark Hahn <[email protected]> wrote:
> the cores on AMD's dual-core chips are most definitely not 
> independent ICs.

So you're saying the ALUs, FPUs, L1 cache, L2 cache, etc... logic is
merged between the two cores?

I'm talking a self-contained integrated circuit that operates on its
own (short of any power/pin-out).  From my understanding, there's not
change in what each core is externally, at least logically (and
fundamentally electrically) from independent dies.

Now if you define it in different ways, please detail, I'm curious.

> the opposite is true: Intel's DC chips are much closer to being
> separate ICs, since they're attached with even less bridging
> (present two bus loads, for instance).

Huh?  How does interconnect two "front side busses" to a single
memory controller hub (MCH) without bridging them _before_?

> it meets your level of knowlege.

Wow, that wasn't an insult.  Thanx.
I'm not your regular Joe IT puke, but thanx for the assumption.

> the diagram is the same one that AMD has presented from the
> very beginning, always showing core-srq-xbar. before DC,
> the srq seemed out-of-place.
> HT has never had a 4-CPU limit.

When did *I* say it did?  Now you're _really_ reading into things.

I just said that's how it is being _commonly_implemented_ in
multi-boards.  A partial mesh of HyperTransport between CPUs (and
I/O), and then using one or more HyperTransport links from one of the
CPUs to the next board.

> but perhaps you're confusing this with Newisys's Horus.

No, and not IBM's new AGTL+ crossbar either.

> so they're going to invent a whole new HT addressing scheme
> just so they can do glueless HT within the chip?

No, quite the opposite!  I'm saying the addressing scheme is the
_exact_same_.  I'm not following your logic at all here.

> that makes no sense.  it would be pointless and expensive 
> generality.

I'm not following your logic at all here.



-- 
Bryan J. Smith     Professional, Technical Annoyance
[email protected]      http://thebs413.blogspot.com
----------------------------------------------------
*** Speed doesn't kill, difference in speed does ***

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