RE: Hyperthreading & 8.0

Is there any reason why dual Athlon MPs won't "hyperthread"? I could be
wrong, but I thought late model Athlons have multiple instruction
pipelines. Superscalar or something like that. How different is that
from what Intel is promising?

--Doc Savage
  Fairview Heights, IL

On Mon, 2002-09-23 at 15:18, Lotas T Smartman wrote:
>  
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> Am I not wrong in thinking that hyperthreading is only in the Xeon
> P4's? and the newer ones out next year? Standard P4's now don't have
> it, or am I wrong?
> 
> - -----Original Message-----
> From: [email protected]
> [mailto:[email protected]] On Behalf Of Ian Holsman
> Sent: 23 September 2002 20:27
> To: [email protected]
> Subject: Re: Hyperthreading & 8.0
> 
> Samuel Flory wrote:
> > Ian Holsman wrote:
> > 
> >> will 8.0 be able to support hyperthreading ?
> >> I belive it is standard in 2.4.19, but I can't see anything in the
> >>  current patchset in the beta which says that it has this patch 
> >> backported into it.
> > 
> > 
> > 
> >  Hyperthreading has been support for a long time.  In the main
> > kernel  line it was supported as of 2.4.18.  Currently it's
> > supported under both  7.2, and 7.3 eratta kernels.
> > 
> > 
> 
> Thanks.
> I thought it was 2.4.19 only..
> hopefully I'll have my pIV box soon to try out it out ;-)
> 
> 
> 
> 
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> -----BEGIN PGP SIGNATURE-----
> Version: PGPfreeware 7.0.3 for non-commercial use <http://www.pgp.com>
> 
> iQA/AwUBPY93EmlCMijQrtpeEQLsyQCg0cCTLyh7lUjaeDGPXpBDgaMmCpYAn2+f
> +JSml7vu89yZo14o+TP3sC9V
> =msJP
> -----END PGP SIGNATURE-----
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