Confirmed pinouts and other daughter board stuff
Patrick McNamara <wpmcnamara-/[email protected]>
| Newsgroups | gmane.linux.uclinux.actiontec |
|---|---|
| Message-ID | <[email protected]> |
After some close study of the daughterboard images, I can confirm the pinouts J5 pinouts that are on the wiki. I can also confirm that ttyS1 would reside at 0x002c0008 if the chip were there. J2-18 (HC04) selects between the two UART chips. I also think I have determined what the JP1/JP2 jumper block on the daughter card does. It configures the interrupt settings on the card as follows: JP1:1-2, JP2:1-2 -- UART1 on GPIO25, UART2 on GPIO24 JP1:1-2, JP2:2-3 -- UART2 on GPIO25, UART2 disabled JP1:2-3, JP2:1-2 -- UART1 and UART2 on GPIO25, UART2 on GPIO24 (I think this would be considered invalid) JP1:2-3, JP2:2-3 -- Both UARTs on GPIO25 (shared interrupt line). I have parts on order to build the serial portion of the daughter board. They should arrive middle of next week. Patrick M __ ActionHack Mailing List - ActionHack-W7/[email protected] http://www.express.org/mailman/listinfo/actionhack http://www.embeddedlinuxinterfacing.com/wiki.php/ActiontecDualModem