Re: Challenge: CCL port to the RPi Pico (RP2040)

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On Sun, Jul 28, 2024 at 7:54=E2=80=AFAM Tim McNerney <[email protected]> wro=
te:

> CCL already has 32-bit ARM support. There is no OS interfacing work to do
> here (only work to make up for the *lack* of OS).
>

The Cortex-M processors execute Thumb-1 or Thumb-2 instructions which are
different from 32-bit ARM instructions.  The Cortex-A designs and older
designs from ARM with a "T" in their name support both the 32-bit ARM and
Thumb instructions.

On a Cortex-A and other processors that support both ISAs, code can switch
between ISA states with the BX or BLX instruction setting the lower bit of
the destination to 1 or 0 to specify either the Thumb or ARM ISA.  If
someone wants to add a backend to the Cortex-M, starting with a working ARM
backend and switching the code generator to using Thumb would seem like a
possible way to start.

Anyone interested in the history of the ARM instruction set and how Thumb
came to be might like this YouTube video

https://www.youtube.com/watch?v=3D_6sh097Dk5k

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<div dir=3D"ltr"><div class=3D"gmail_quote"><div dir=3D"ltr" class=3D"gmail=
_attr">On Sun, Jul 28, 2024 at 7:54=E2=80=AFAM Tim McNerney &lt;<a href=3D"=
mailto:[email protected]" target=3D"_blank">[email protected]</a>&gt; wrote:<=
br></div><blockquote class=3D"gmail_quote" style=3D"margin:0px 0px 0px 0.8e=
x;border-left:1px solid rgb(204,204,204);padding-left:1ex"><div dir=3D"auto=
"><div dir=3D"ltr"><div dir=3D"ltr"><div><div>CCL already has 32-bit ARM su=
pport. There is no OS interfacing work to do here (only work to make up for=
 the <i>lack</i> of OS).=C2=A0</div></div></div></div></div></blockquote><d=
iv><br></div><div>The Cortex-M processors execute Thumb-1 or Thumb-2 instru=
ctions which are different from 32-bit ARM instructions.=C2=A0 The Cortex-A=
 designs and older designs from ARM with a &quot;T&quot; in their name supp=
ort both the 32-bit ARM and Thumb instructions.</div><div><br></div><div>On=
 a Cortex-A and other processors that support both ISAs, code can switch be=
tween ISA states with the BX or BLX instruction setting the lower bit of th=
e destination to 1 or 0 to specify either the Thumb or ARM ISA.=C2=A0 If so=
meone wants to add a backend to the Cortex-M, starting with a working ARM b=
ackend and switching the code generator to using Thumb would seem like a po=
ssible way to start.</div><div><br></div><div>Anyone interested in the hist=
ory of the ARM instruction set and how Thumb came to be might like this You=
Tube video<br></div><div><br></div><div><a href=3D"https://www.youtube.com/=
watch?v=3D_6sh097Dk5k">https://www.youtube.com/watch?v=3D_6sh097Dk5k</a></d=
iv><br></div></div>

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