Re: Access to Lanai SRAM using DMA over the PCI bus
Patrick Geoffray <[email protected]> Wed, 16 May 2007 14:22:48 -0400
| Newsgroups | gmane.network.myrinet.general |
|---|---|
| Organization | Myricom, Inc. |
| Message-ID | <[email protected]> |
Vangelis Koukis wrote: > Any pointers, comments, help would be greatly appreciated. One hardware engineer tell me that the LanaiXP chip used in PCI-X NICs do not support bursting as read target, so the performance in this direction would be bad. Patrick -- Patrick Geoffray Myricom, Inc. http://www.myri.com