Re: Access to Lanai SRAM using DMA over the PCI bus

Hi Vangelis,

Vangelis Koukis wrote:
> However, when programming the same device to do *reads* from this address
> space using DMA, i.e. to fetch data from SRAM, it can't do more than
> ~20MB/s... When dealing with main memory, the device reads and writes
> at ~300MB/s (using PC133 SDRAM).

> Any pointers, comments, help would be greatly appreciated.

Are you sure that there is no bridge between the two devices ? Could you 
send the output of "lspci -tv" ?

I have done DMA Writes to the SRAM of a Myrinet NIC in the past (from 
SCSI controller), but never done Reads as it didn't make sense to avoid 
the host memory in this direction.

Is the PIO Read bandwidth to the Myrinet NIC greater than 20 MB/s ?

Patrick
-- 
Patrick Geoffray
Myricom, Inc.
http://www.myri.com