RTL Phase Started-Off!

Dear NOUR team, 

I am gladly informing that the RTL coding phase for NOUR bit-stream
processing engine has already started-off.

The Baseband Bit-Stream HW design Specs document is updated under:
http://www.handasarabia.org/document.php?id=110
The new Phase of  RTL coding (VHDL and/or Verilog) for the bitstream
components should cover coding and simulation for each module at first
followed by an integration and verification phase subsequently.

I am looking forward to getting your feedback which should include your
components of interest, hence we can distribute the development tasks
for the HDL RTL phase.

Note: For all of you who are interested in Software coding for the
System level in C and/or Java or whatever, it is your role to come out
with the system level modeling for the bitstream processing engine. 

Thanks All who had helped in accomplishing the HW design Specs.
document, Especially Ravi Ranjan Kumar.


Let us Realize NOUR.

Best Regards,

	Mohamed A.Salem






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Message number 138