Re: Rep:Re: [NOUR] NOUR Progress ?
"sanjay" <sanjay-DJjWKTqr9he2oZ/[email protected]> Sun, 31 Aug 2003 22:31:49 -0700
| Newsgroups | gmane.org.handasarabia.nour |
|---|---|
| Message-ID | <[email protected]> |
hi all, i hav joined u bit late in your developements.anyway i am interested to wor= k on BT protocol stack in FPGA or asic, i am good in verilog so coding is n= o matter for me. where could i get bluetooth latest 1.1 spec's. & i would be pleased if anyb= ody will transfer coding work for me.so i can gear up with u all guys. thanks in advance sanjay ---------- Original Message ---------------------------------- From: "Hany KAMAL" <[email protected]> Reply-To: [email protected] Date: Sun, 31 Aug 2003 18:40:50 GMT >It's been a long time that i'm working on building an individual link >level "PHY" also combined with a system level simulator for BT on >MATLAB. !! > >i don't know if that could help. >it really takes VERY LONG TIME. >but i like that and i'm going on anyway . > >salam >Hany > >-----Message d'origine----- >De: Mike Rowehl <[email protected]> >A: [email protected] >Date: 31/08/03 >Objet: Re: [NOUR] NOUR Progress ? > >On 0, Mohamed Eldesoky <[email protected]> wrote: >> So what ? >> Why I see it stalled suddenly here ?? >> >I think cause no one knows already how to do what we need to do, and >it's >taking a long time to learn. Reading the Bluetooth 1.1 spec (more than >1000 >pages) is a pretty lengthy task on it's own. But then we have the >problem that >the hardware and software sides don't quite meet up in terms of both >terminology and expectations. I've been trying to learn VHDL to get a >bit of >a better grip on how we should continue, so that I can understand the >type of >hardware design that everyone has been talking about. But that also is >very >slow going. I understand the contents of the VHDL book that I have, but >there >aren't very good open source tools to learn with. Plus, I still don't >have a >very good idea about how this would actually be used. The information >I've >found online says that VHDL can be used for both setting up simulation >and for >synthesis, but when I've asked about using design files to setup tests >it seems >there are other ill-defined steps required before they can be used. > >I haven't been posting anything because I don't think I have a good plan >for >how to implement what our next steps should be. No one else has stepped >up >with an alternate plan, so I'm assuming we would like to setup a >simulated >NOUR environment. But who is familiar enough over all of Bluetooth, >hardware >design, and software to setup a system? I would be willing to setup the > >software end of these things, but I'm just not familiar enough with >hardware to be able to answer the questions that come up from the >hardware side about how >that simulation would be used to validate designs. Since that work >might not >be very usefull in the long run, I've held off from doing it while I >read. >That has been taking a VERY long time. I'm still around however. > > Mike > >-------------------------- >NOUR Mailing List >Handasa Arabia Organization >http://www.handasarabia.org > >Message number 51 > >_____________________________________________________________________ >Envie de discuter en "live" avec vos amis ? T=E9l=E9charger MSN Messenger >http://www.ifrance.com/_reloc/m la 1=E8re messagerie instantan=E9e de Fran= ce > > >_____________________________________________________________________ >MSN Messenger, nouvelle version ! Personnalisez vos messages, jouez en >ligne et communiquez en temps r=E9el par vid=E9o! http://ifrance.com/_relo= c/m > > >-------------------------- >NOUR Mailing List >Handasa Arabia Organization >http://www.handasarabia.org > >Message number 52 > > -------------------------- NOUR Mailing List Handasa Arabia Organization http://www.handasarabia.org Message number 54