Re: NOUR Progress ?

Hi Mike, 
Ease your pace my friend... This is how it works in "open-Source", The
fact is that the members are focused on getting "OFOQ" mile-stones done.
The work here is still adherent with the preassigned schedule. We have
some RTL coding of some of the Hardware modules that are described in
the NOUR specs. on the site (I would work with you and Jamil to update
the specs. as we agreed before.). The RTL coding is in VHDL and in
Verilog, so both are accepted to be plugged in our design. The question
was about building a System Model for the Bluetooth system. In other
words, Building The Nour Emulators of layers and interfaces and try to
make the interaction between them possible using the suggested "message
passing mechanism" . I would get here a question about the "register
interface" with the HW side and whether is it valid or not ? The answer
is coming by system integration and development of the system model
including the emulators. It is still a bit close of spinning the
wheels.! I don't wanna a negative tone to propagate between designers
and developers. On the other hand, We are now testing the CPU of OFOQ
and trying hardly (under time pressure) to get the memory controller
done. SO that You Mike can then contribute with the most output to make
the UCLinux porting and device drivers a reality on the prototyping
board. Also the HA administration  team who are the major contributors
was pretty busy with preparing the HA site and interface to be in the
best frame as there was a EE Times Press and EE design concern about our
organization. 
So, Mike.. Let us discuss it that we are investigating the realization
of our running projects which means A step or a part of a step forward
to the objectives... So We are progressing .. The actual argument right
now is also a progress .. We are not stalled or something like that any
more since we launch that organization.... 
In the next mails here, ""I suggest a task for me, you and Jamil"" .
The task is review of NOUR Specs. and as a result working on an updated
schedule of tasks and assignments. There are some new users who wanna
have a seat :)
let us meet together and discuss the next days plan....

Thank you so much Mike for your efforts .. Hey man , you are now playing
with VHDL . It is really pretty good! you may be assigned some coding of
HW modules ...;)
let me see u daily on line . I know that u r somehow busy working but a
minutes may make a difference... 

Best Regards,

Mohamed A. Salem
Handasa Arabia Organization
www.handasarabia.org




On Sun, 2003-08-31 at 20:37, Mike Rowehl wrote:
> On  0, Mohamed Eldesoky <[email protected]> wrote:
> > So what ?
> > Why I see it stalled suddenly here ??
> > 
> I think cause no one knows already how to do what we need to do, and it's
> taking a long time to learn.  Reading the Bluetooth 1.1 spec (more than 1000
> pages) is a pretty lengthy task on it's own.  But then we have the problem that
> the hardware and software sides don't quite meet up in terms of both 
> terminology and expectations.  I've been trying to learn VHDL to get a bit of
> a better grip on how we should continue, so that I can understand the type of
> hardware design that everyone has been talking about.  But that also is very 
> slow going.  I understand the contents of the VHDL book that I have, but there
> aren't very good open source tools to learn with.  Plus, I still don't have a
> very good idea about how this would actually be used.  The information I've 
> found online says that VHDL can be used for both setting up simulation and for
> synthesis, but when I've asked about using design files to setup tests it seems
> there are other ill-defined steps required before they can be used.
> 
> I haven't been posting anything because I don't think I have a good plan for 
> how to implement what our next steps should be.  No one else has stepped up
> with an alternate plan, so I'm assuming we would like to setup a simulated 
> NOUR environment.  But who is familiar enough over all of Bluetooth, hardware
> design, and software to setup a system?  I would be willing to setup the 
> software end of these things, but I'm just not familiar enough with hardware to be able to answer the questions that come up from the hardware side about how
> that simulation would be used to validate designs.  Since that work might not
> be very usefull in the long run, I've held off from doing it while I read.
> That has been taking a VERY long time.  I'm still around however.
> 
>                                                             Mike
> 
> --------------------------
> NOUR Mailing List
> Handasa Arabia Organization
> http://www.handasarabia.org
> 
> Message number 51
-- 
Mohamed A.Salem
Handasa Arabia Organization
www.handasarabia.org


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Message number 55