SRAM On Board- Document

Dear All, 
	I have compiled a document about the SSRAM memory on the SOPC"System On
Programmable Chip" Board. It provides the required information for the
memory controller core design. The SSRAM will be used as our "main
memory". The document can be found at:
http://www.handasarabia.org/document.php?id=103
The document has some queries. Please provide your answers as possible.

	Download the SRAM memory controller "Verilog file" which was used for a
similar SRAM on XESS board.
http://www.opencores.org/cvsweb.shtml/or1k/orp/orp_soc/rtl/verilog/mem_if/sram_top.v
	This file could be manipulated to achieve our own SRAM interface or we
could use it as a reference while building our own in "VHDL and/or
Verilog".

on another note: 
	I'd like all of us to have a look on the ORPsoc project from Opencore
which is a complete simulation environment for System On Chip based on
Open Risc Processor. It has software packages and hardware cores. It is
not just a simulation environment but it can be customized to a close
vision to what we need for OFOQ system.
The link is :
http://www.opencores.org/projects/or1k/ORPsoc
"OpenRisc Reference Platform for SoC"

	Thanks all for your time and Contribution.

Best Regards,

-- 
Mohamed A.Salem
Handasa Arabia Organization
www.handasarabia.org


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