Re: Attempt to Add a New Tulip PNIC2 82C115 NIC Not Working
Alexander Jacocks <[email protected]> Sat, 30 Aug 2025 13:49:28 -0400
| Newsgroups | gmane.os.netbsd.ports.i386 |
|---|---|
| Message-ID | <CAF-r0Y12BqGm-f7+HnL0fR3OCxzTnvjMedB+52DTCzn=dCDXSg@mail.gmail.com> |
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On Sat, Aug 30, 2025 at 9:24=E2=80=AFAM Jonathan A. Kollasch <jakllsch@koll=
asch.net>
wrote:
> On Sat, Aug 30, 2025 at 06:40:46AM +0000, RVP wrote:
> > On Fri, 29 Aug 2025, Alexander Jacocks wrote:
> >
> > > $ sudo pcictl pci0 dump -d 10
> > > PCI configuration registers:
> > > Common header:
> > > 0x00: 0x00000000 0x82900004 0x00000000 0x00004008
> > >
> > > Vendor ID: 0x0000
> > > Device ID: 0x0000
> > >
> >
> > This is _very_ bad. Can you:
> >
> > 1. check that both this card, and the other one, are seated firmly in
> the slot.
> >
> > 2. try the cards in another PCI slot.
> >
> > 3. inspect the edge connectors--ensure that the metal hasn't worn off.
> >
> > 4. reset BIOS to defaults.
>
> 4.1 and then disable any "PnP OS" option.
>
Thanks so much, folks! It was indeed oxidation of the gold fingers on the
PCI card. Believe it or not, I've never run into that problem with that on
a card as modern as PCI.
The card now seems to work, and returns this from pcictl:
$ sudo pcictl pci0 dump -d 10
PCI configuration registers:
Common header:
0x00: 0xc11511ad 0x02900087 0x02000025 0x00004008
Vendor Name: Lite-On Communications (0x11ad)
Device Name: 82C115 (PNIC II) 10/100 Ethernet (0xc115)
Command register: 0x0087
I/O space accesses: on
Memory space accesses: on
Bus mastering: on
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: off
Address/data stepping: on
System error (SERR): off
Fast back-to-back transactions: off
Interrupt disable: off
Status register: 0x0290
Immediate Readiness: off
Interrupt status: inactive
Capability List support: on
66 MHz capable: off
User Definable Features (UDF) support: off
Fast back-to-back capable: on
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: off
Asserted System Error (SERR): off
Parity error detected: off
Class Name: network (0x02)
Subclass Name: ethernet (0x00)
Interface: 0x00
Revision ID: 0x25
BIST: 0x00
Header Type: 0x00 (0x00)
Latency Timer: 0x40
Cache Line Size: 32bytes (0x08)
Type 0 ("normal" device) header:
0x10: 0x0000e801 0xef000000 0x00000000 0x00000000
0x20: 0x00000000 0x00000000 0x00000000 0x000b2646
0x30: 0xee000000 0x00000044 0x00000000 0x38080103
Base address register at 0x10
type: I/O
base: 0x0000e800
Base address register at 0x14
type: 32-bit nonprefetchable memory
base: 0xef000000
Base address register at 0x18
not implemented
Base address register at 0x1c
not implemented
Base address register at 0x20
not implemented
Base address register at 0x24
not implemented
Cardbus CIS Pointer: 0x00000000
Subsystem vendor ID: 0x2646
Subsystem ID: 0x000b
Expansion ROM Base Address Register: 0xee000000
base: 0xee000000
Expansion ROM Enable: off
Validation Status: Validation not supported
Validation Details: 0x0
Capability list pointer: 0x44
Reserved @ 0x38: 0x00000000
Maximum Latency: 0x38
Minimum Grant: 0x08
Interrupt pin: 0x01 (pin A)
Interrupt line: 0x03
Capability register at 0x44
type: 0x01 (Power Management)
PCI Power Management Capabilities Register
Capabilities register: 0xf601
Version: 1.0
PME# clock: off
Device specific initialization: off
3.3V auxiliary current: self-powered
D1 power management state support: on
D2 power management state support: on
PME# support D0: off
PME# support D1: on
PME# support D2: on
PME# support D3 hot: on
PME# support D3 cold: on
Control/status register: 0x00000000
Power state: D0
PCI Express reserved: off
No soft reset: off
PME# assertion: disabled
Data Select: 0
Data Scale: 0
PME# status: off
Bridge Support Extensions register: 0x00
B2/B3 support: off
Bus Power/Clock Control Enable: off
Data register: 0x00
Device-dependent header:
0x40: 0x00000000 0xf6010001 0x00000000 0x00000000
0x50: 0x00000000 0x00000000 0x00000000 0x00000000
0x60: 0x00000000 0x00000000 0x00000000 0x00000000
0x70: 0x00000000 0x00000000 0x00000000 0x00000000
0x80: 0x00000000 0x00000000 0x00000000 0x00000000
0x90: 0x00000000 0x00000000 0x00000000 0x00000000
0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
If anyone would like to help me, I'd like to submit a patch to add this
card to the supported NICs. I'm sure that I did something that isn't kosher
in the changes that I made, so I'd love advice.
- Alex
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<div dir=3D"ltr"><div class=3D"gmail_quote gmail_quote_container"><div dir=
=3D"ltr" class=3D"gmail_attr">On Sat, Aug 30, 2025 at 9:24=E2=80=AFAM Jonat=
han A. Kollasch <<a href=3D"mailto:[email protected]">jakllsch@kolla=
sch.net</a>> wrote:<br></div><blockquote class=3D"gmail_quote" style=3D"=
margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-lef=
t:1ex">On Sat, Aug 30, 2025 at 06:40:46AM +0000, RVP wrote:<br>
> On Fri, 29 Aug 2025, Alexander Jacocks wrote:<br>
> <br>
> > $ sudo pcictl pci0 dump -d 10<br>
> > PCI configuration registers:<br>
> >=C2=A0 Common header:<br>
> >=C2=A0 =C2=A0 0x00: 0x00000000 0x82900004 0x00000000 0x00004008<br=
>
> > <br>
> >=C2=A0 =C2=A0 Vendor ID: 0x0000<br>
> >=C2=A0 =C2=A0 Device ID: 0x0000<br>
> > <br>
> <br>
> This is _very_ bad. Can you:<br>
> <br>
> 1. check that both this card, and the other one, are seated firmly in =
the slot.<br>
> <br>
> 2. try the cards in another PCI slot.<br>
> <br>
> 3. inspect the edge connectors--ensure that the metal hasn't worn =
off.<br>
> <br>
> 4. reset BIOS to defaults.<br>
<br>
4.1 and then disable any "PnP OS" option.<br></blockquote><div><b=
r></div><div>Thanks so much, folks! It was indeed oxidation of the gold fin=
gers on the PCI card. Believe=C2=A0it or not, I've never run into that =
problem with that on a card as modern as PCI.</div><div><br></div><div>The =
card now seems to work, and returns this from pcictl:<br></div><div><br></d=
iv><div style=3D"margin-left:40px">$ sudo pcictl pci0 dump -d 10<br>PCI con=
figuration registers:<br>=C2=A0 Common header:<br>=C2=A0 =C2=A0 0x00: 0xc11=
511ad 0x02900087 0x02000025 0x00004008<br><br>=C2=A0 =C2=A0 Vendor Name: Li=
te-On Communications (0x11ad)<br>=C2=A0 =C2=A0 Device Name: 82C115 (PNIC II=
) 10/100 Ethernet (0xc115)<br>=C2=A0 =C2=A0 Command register: 0x0087<br>=C2=
=A0 =C2=A0 =C2=A0 I/O space accesses: on<br>=C2=A0 =C2=A0 =C2=A0 Memory spa=
ce accesses: on<br>=C2=A0 =C2=A0 =C2=A0 Bus mastering: on<br>=C2=A0 =C2=A0 =
=C2=A0 Special cycles: off<br>=C2=A0 =C2=A0 =C2=A0 MWI transactions: off<br=
>=C2=A0 =C2=A0 =C2=A0 Palette snooping: off<br>=C2=A0 =C2=A0 =C2=A0 Parity =
error checking: off<br>=C2=A0 =C2=A0 =C2=A0 Address/data stepping: on<br>=
=C2=A0 =C2=A0 =C2=A0 System error (SERR): off<br>=C2=A0 =C2=A0 =C2=A0 Fast =
back-to-back transactions: off<br>=C2=A0 =C2=A0 =C2=A0 Interrupt disable: o=
ff<br>=C2=A0 =C2=A0 Status register: 0x0290<br>=C2=A0 =C2=A0 =C2=A0 Immedia=
te Readiness: off<br>=C2=A0 =C2=A0 =C2=A0 Interrupt status: inactive<br>=C2=
=A0 =C2=A0 =C2=A0 Capability List support: on<br>=C2=A0 =C2=A0 =C2=A0 66 MH=
z capable: off<br>=C2=A0 =C2=A0 =C2=A0 User Definable Features (UDF) suppor=
t: off<br>=C2=A0 =C2=A0 =C2=A0 Fast back-to-back capable: on<br>=C2=A0 =C2=
=A0 =C2=A0 Data parity error detected: off<br>=C2=A0 =C2=A0 =C2=A0 DEVSEL t=
iming: medium (0x1)<br>=C2=A0 =C2=A0 =C2=A0 Slave signaled Target Abort: of=
f<br>=C2=A0 =C2=A0 =C2=A0 Master received Target Abort: off<br>=C2=A0 =C2=
=A0 =C2=A0 Master received Master Abort: off<br>=C2=A0 =C2=A0 =C2=A0 Assert=
ed System Error (SERR): off<br>=C2=A0 =C2=A0 =C2=A0 Parity error detected: =
off<br>=C2=A0 =C2=A0 Class Name: network (0x02)<br>=C2=A0 =C2=A0 Subclass N=
ame: ethernet (0x00)<br>=C2=A0 =C2=A0 Interface: 0x00<br>=C2=A0 =C2=A0 Revi=
sion ID: 0x25<br>=C2=A0 =C2=A0 BIST: 0x00<br>=C2=A0 =C2=A0 Header Type: 0x0=
0 (0x00)<br>=C2=A0 =C2=A0 Latency Timer: 0x40<br>=C2=A0 =C2=A0 Cache Line S=
ize: 32bytes (0x08)<br><br>=C2=A0 Type 0 ("normal" device) header=
:<br>=C2=A0 =C2=A0 0x10: 0x0000e801 0xef000000 0x00000000 0x00000000<br>=C2=
=A0 =C2=A0 0x20: 0x00000000 0x00000000 0x00000000 0x000b2646<br>=C2=A0 =C2=
=A0 0x30: 0xee000000 0x00000044 0x00000000 0x38080103<br><br>=C2=A0 =C2=A0 =
Base address register at 0x10<br>=C2=A0 =C2=A0 =C2=A0 type: I/O<br>=C2=A0 =
=C2=A0 =C2=A0 base: 0x0000e800<br>=C2=A0 =C2=A0 Base address register at 0x=
14<br>=C2=A0 =C2=A0 =C2=A0 type: 32-bit nonprefetchable memory<br>=C2=A0 =
=C2=A0 =C2=A0 base: 0xef000000<br>=C2=A0 =C2=A0 Base address register at 0x=
18<br>=C2=A0 =C2=A0 =C2=A0 not implemented<br>=C2=A0 =C2=A0 Base address re=
gister at 0x1c<br>=C2=A0 =C2=A0 =C2=A0 not implemented<br>=C2=A0 =C2=A0 Bas=
e address register at 0x20<br>=C2=A0 =C2=A0 =C2=A0 not implemented<br>=C2=
=A0 =C2=A0 Base address register at 0x24<br>=C2=A0 =C2=A0 =C2=A0 not implem=
ented<br>=C2=A0 =C2=A0 Cardbus CIS Pointer: 0x00000000<br>=C2=A0 =C2=A0 Sub=
system vendor ID: 0x2646<br>=C2=A0 =C2=A0 Subsystem ID: 0x000b<br>=C2=A0 =
=C2=A0 Expansion ROM Base Address Register: 0xee000000<br>=C2=A0 =C2=A0 =C2=
=A0 base: 0xee000000<br>=C2=A0 =C2=A0 =C2=A0 Expansion ROM Enable: off<br>=
=C2=A0 =C2=A0 =C2=A0 Validation Status: Validation not supported<br>=C2=A0 =
=C2=A0 =C2=A0 Validation Details: 0x0<br>=C2=A0 =C2=A0 Capability list poin=
ter: 0x44<br>=C2=A0 =C2=A0 Reserved @ 0x38: 0x00000000<br>=C2=A0 =C2=A0 Max=
imum Latency: 0x38<br>=C2=A0 =C2=A0 Minimum Grant: 0x08<br>=C2=A0 =C2=A0 In=
terrupt pin: 0x01 (pin A)<br>=C2=A0 =C2=A0 Interrupt line: 0x03<br><br>=C2=
=A0 Capability register at 0x44<br>=C2=A0 =C2=A0 type: 0x01 (Power Manageme=
nt)<br><br>=C2=A0 PCI Power Management Capabilities Register<br>=C2=A0 =C2=
=A0 Capabilities register: 0xf601<br>=C2=A0 =C2=A0 =C2=A0 Version: 1.0<br>=
=C2=A0 =C2=A0 =C2=A0 PME# clock: off<br>=C2=A0 =C2=A0 =C2=A0 Device specifi=
c initialization: off<br>=C2=A0 =C2=A0 =C2=A0 3.3V auxiliary current: self-=
powered<br>=C2=A0 =C2=A0 =C2=A0 D1 power management state support: on<br>=
=C2=A0 =C2=A0 =C2=A0 D2 power management state support: on<br>=C2=A0 =C2=A0=
=C2=A0 PME# support D0: off<br>=C2=A0 =C2=A0 =C2=A0 PME# support D1: on<br=
>=C2=A0 =C2=A0 =C2=A0 PME# support D2: on<br>=C2=A0 =C2=A0 =C2=A0 PME# supp=
ort D3 hot: on<br>=C2=A0 =C2=A0 =C2=A0 PME# support D3 cold: on<br>=C2=A0 =
=C2=A0 Control/status register: 0x00000000<br>=C2=A0 =C2=A0 =C2=A0 Power st=
ate: D0<br>=C2=A0 =C2=A0 =C2=A0 PCI Express reserved: off<br>=C2=A0 =C2=A0 =
=C2=A0 No soft reset: off<br>=C2=A0 =C2=A0 =C2=A0 PME# assertion: disabled<=
br>=C2=A0 =C2=A0 =C2=A0 Data Select: 0<br>=C2=A0 =C2=A0 =C2=A0 Data Scale: =
0<br>=C2=A0 =C2=A0 =C2=A0 PME# status: off<br>=C2=A0 =C2=A0 Bridge Support =
Extensions register: 0x00<br>=C2=A0 =C2=A0 =C2=A0 B2/B3 support: off<br>=C2=
=A0 =C2=A0 =C2=A0 Bus Power/Clock Control Enable: off<br>=C2=A0 =C2=A0 Data=
register: 0x00<br><br>=C2=A0 Device-dependent header:<br>=C2=A0 =C2=A0 0x4=
0: 0x00000000 0xf6010001 0x00000000 0x00000000<br>=C2=A0 =C2=A0 0x50: 0x000=
00000 0x00000000 0x00000000 0x00000000<br>=C2=A0 =C2=A0 0x60: 0x00000000 0x=
00000000 0x00000000 0x00000000<br>=C2=A0 =C2=A0 0x70: 0x00000000 0x00000000=
0x00000000 0x00000000<br>=C2=A0 =C2=A0 0x80: 0x00000000 0x00000000 0x00000=
000 0x00000000<br>=C2=A0 =C2=A0 0x90: 0x00000000 0x00000000 0x00000000 0x00=
000000<br>=C2=A0 =C2=A0 0xa0: 0x00000000 0x00000000 0x00000000 0x00000000<b=
r>=C2=A0 =C2=A0 0xb0: 0x00000000 0x00000000 0x00000000 0x00000000<br>=C2=A0=
=C2=A0 0xc0: 0x00000000 0x00000000 0x00000000 0x00000000<br>=C2=A0 =C2=A0 =
0xd0: 0x00000000 0x00000000 0x00000000 0x00000000<br>=C2=A0 =C2=A0 0xe0: 0x=
00000000 0x00000000 0x00000000 0x00000000<br>=C2=A0 =C2=A0 0xf0: 0x00000000=
0x00000000 0x00000000 0x00000000</div><div><br></div><div>If anyone would =
like to help me, I'd like to submit a patch to add this card to the sup=
ported NICs. I'm sure that I did something that isn't kosher in the=
changes that I made, so I'd love advice.</div><div><br></div><div>- Al=
ex</div></div></div>
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