MIPS 20Kc cache
"Toru Nishimura" <[email protected]> Mon, 19 Aug 2002 20:35:47 +0900
| Newsgroups | gmane.os.netbsd.ports.mips |
|---|---|
| Message-ID | <000701c24774$906f8000$0d00a8c0@paq5> |
Folks, MIPS 20Kc defines the cache architecture radically differently from standard R4000 derivatives. Could someone out there enlighten me the rationale behind the changes? Pointers to info-sources are welcome. Toru Nishimura/ALKYL Technology