re: Pausing/resuming CPU's in DDB

> If it only fails for ddb enter/exit the loop is fine, IMHO - but as we have
> seen other reports of ipi sending failure during normal operation, we should
> add the instrumentation Eduardo suggested and find out where we are blocked
> out that long (but this is mostly orthogonal to the topic at hand).

FWIW, to debug some sparc smp issues i was seeing i added an NMI IPI
that made the remote cpus log their %pc, if they weren't answering
normal IPIs.  i never tried porting this code to sparc64 in any sense
(and it isn't commited to sparc port anyway) because level 15 is no
longer "NMI", as i recall anyway.

but the feature is simple to implement and use, if it works.


.mrg.