[Accel-config] Re: [PATCH v2 3/7] accel-config/test: Modify structs for reused by DSA and IAA

Dave Jiang <dave.jiang at intel.com> Fri, 01 Apr 2022 10:53:29 -0700
Newsgroups dev.linux.lists.accel-config
Message-ID <[email protected]>
On 4/1/2022 5:55 AM, Li Zhang wrote:
> To be compatible with IAA, add IAA register description into struct
> dsa_hw_desc and struct dsa_completion_record, delete struct iax_hw_desc
> , struct iax_completion_record and struct iax_raw_completion_record,
> enlarge struct dsa_raw_completion_record from 32 bytes to 64 bytes,
> add IAA related fields into struct task.
>
> Signed-off-by: Li Zhang <li4.zhang(a)intel.com>
> Reviewed-by: Dave Jiang <dave.jiang(a)intel.com>
> ---
>   accfg/idxd.h | 98 +++++++++++++++++++++++++++++-----------------------
>   test/dsa.c   |  4 +--
>   test/dsa.h   | 19 +++++++++-
>   3 files changed, 75 insertions(+), 46 deletions(-)
>
> diff --git a/accfg/idxd.h b/accfg/idxd.h
> index 9cfca5d..7e2bd2f 100644
> --- a/accfg/idxd.h
> +++ b/accfg/idxd.h
> @@ -168,7 +168,12 @@ struct dsa_hw_desc {
>   		uint32_t	desc_count;
>   	};
>   	uint16_t	int_handle;
> -	uint16_t	rsvd1;
> +	union {
> +		uint16_t	rsvd1;
> +		uint16_t        iax_compr_flags;
> +		uint16_t        iax_decompr_flags;
> +		uint16_t        iax_crc64_flags;
> +	};
>   	union {
>   		uint8_t		expected_res;
>   		/* create delta record */
> @@ -219,33 +224,25 @@ struct dsa_hw_desc {
>   			uint16_t	dest_app_tag_mask;
>   			uint16_t	dest_app_tag_seed;
>   		};
> +		/* IAX common */
> +		struct {
> +			uint64_t        iax_src2_addr;
> +			uint32_t        iax_max_dst_size;
> +			uint32_t        iax_src2_xfer_size;
> +			uint32_t	iax_filter_flags;
> +			uint32_t	iax_num_inputs;
> +		};
> +		/* CRC64 */
> +		struct {
> +			uint64_t        iax_crc64_rsvd;
> +			uint64_t        iax_crc64_rsvd2;
> +			uint64_t        iax_crc64_poly;
> +		};
>   
>   		uint8_t		op_specific[24];
>   	};
>   } __attribute__((packed));
>   
> -struct iax_hw_desc {
> -	uint32_t        pasid:20;
> -	uint32_t        rsvd:11;
> -	uint32_t        priv:1;
> -	uint32_t        flags:24;
> -	uint32_t        opcode:8;
> -	uint64_t        completion_addr;
> -	uint64_t        src1_addr;
> -	uint64_t        dst_addr;
> -	uint32_t        src1_size;
> -	uint16_t        int_handle;
> -	union {
> -		uint16_t        compr_flags;
> -		uint16_t        decompr_flags;
> -	};
> -	uint64_t        src2_addr;
> -	uint32_t        max_dst_size;
> -	uint32_t        src2_size;
> -	uint32_t	filter_flags;
> -	uint32_t	num_inputs;
> -} __attribute__((packed));
> -
>   struct dsa_raw_desc {
>   	uint64_t	field[8];
>   } __attribute__((packed));
> @@ -298,30 +295,45 @@ struct dsa_completion_record {
>   			uint16_t	dif_upd_dest_app_tag;
>   		};
>   
> -		uint8_t		op_specific[16];
> -	};
> -} __attribute__((packed));
> +		/* IAX common */
> +		struct {
> +			uint32_t	iax_invalid_flags;
> +			uint32_t	iax_rsvd;
> +			uint32_t	iax_output_size;
> +			uint8_t		iax_output_bits;
> +			uint8_t		iax_rsvd2;
> +			uint16_t	iax_xor_chksum;
> +			uint32_t	iax_crc;
> +			union {
> +				uint32_t	iax_min;
> +				uint32_t	iax_first;
> +			};
> +			union {
> +				uint32_t	iax_max;
> +				uint32_t	iax_last;
> +			};
> +			union {
> +				uint32_t	iax_sum;
> +				uint32_t	iax_population_cnt;
> +			};
> +		};
>   
> -struct dsa_raw_completion_record {
> -	uint64_t	field[4];
> -} __attribute__((packed));
> +		/* CRC64 */
> +		struct {
> +			uint32_t	crc64_invalid_flags;
> +			uint32_t	crc64_rsvd;
> +			uint64_t	crc64_rsvd2;
> +			uint64_t	crc64_rsvd3;
> +			uint64_t	crc64_result;
> +		};
>   
> -struct iax_completion_record {
> -	__volatile__ uint8_t        status;
> -	uint8_t                 error_code;
> -	uint16_t                rsvd;
> -	uint32_t                bytes_completed;
> -	uint64_t                fault_addr;
> -	uint32_t                invalid_flags;
> -	uint32_t                rsvd2;
> -	uint32_t                output_size;
> -	uint8_t                 output_bits;
> -	uint8_t                 rsvd3;
> -	uint16_t                rsvd4;
> -	uint64_t                rsvd5[4];
> +		/* To be compatible with IAX, alloc 64 bytes*/
> +		uint8_t		op_specific[48];
> +	};
>   } __attribute__((packed));
>   
> -struct iax_raw_completion_record {
> +struct dsa_raw_completion_record {
> +	/* To be compatible with IAX, alloc 64 bytes*/
>   	uint64_t	field[8];
>   } __attribute__((packed));
>   
> diff --git a/test/dsa.c b/test/dsa.c
> index 25ed7ba..2c98d4a 100644
> --- a/test/dsa.c
> +++ b/test/dsa.c
> @@ -299,8 +299,8 @@ struct task *acctest_alloc_task(void)
>   	}
>   	memset(tsk->desc, 0, sizeof(struct dsa_hw_desc));
>   
> -	/* completion record need to be 32bits aligned */
> -	tsk->comp = aligned_alloc(32, sizeof(struct dsa_completion_record));
> +	/* To be compatible with IAX, completion record need to be 64-byte aligned */
> +	tsk->comp = aligned_alloc(64, sizeof(struct dsa_completion_record));
>   	if (!tsk->comp) {
>   		free_task(tsk);
>   		return NULL;
> diff --git a/test/dsa.h b/test/dsa.h
> index 6e8ae17..8afeed5 100644
> --- a/test/dsa.h
> +++ b/test/dsa.h
> @@ -91,6 +91,22 @@ struct task {
>   	int guardtag;
>   	unsigned long blks;
>   	int blk_idx_flg;
> +
> +	/* Dedicate for IAA test */
> +	union {
> +		uint16_t iax_compr_flags;
> +		uint16_t iax_decompr_flags;
> +		uint16_t iax_crc64_flags;
> +	};
> +	uint32_t iax_max_dst_size;
> +	uint32_t iax_src2_xfer_size;
> +	union {
> +		struct {
> +			uint32_t iax_filter_flags;
> +			uint32_t iax_num_inputs;
> +		};
> +		uint64_t iax_crc64_poly;
> +	};
>   };
>   
>   struct task_node {
> @@ -221,7 +237,8 @@ static inline void dump_compl_rec(struct dsa_completion_record *compl)
>   
>   	dbg("completion record addr: %p\n", compl);
>   
> -	for (i = 0; i < 4; i++)
> +	/* To be compatible with IAX, completion record was allocated 64 bytes*/
> +	for (i = 0; i < 8; i++)'

This needs to be dumped different size dependent on the device type right?


>   		dbg("compl[%d]: 0x%016lx\n", i, rcompl->field[i]);
>   }
>