[OPAE] UDP parser

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Hi all

Hi all

I'm very new to Intel PAC (also RTL) and trying to figure out how to parse =
a UDP packet (plus payload) inside Intel Arria 10. I wanted to use this PAC=
 because the latency values are the best. I'll ask very basic questions for=
 you, so I apologize in advance.

1) There will be no switching between ports. The traffic is UDP Multicast, =
so ports just consume the network packets. I do not need to check VLAN, MPL=
S, IP options etc.. The UDP ports and payload are the same offsets, so with=
out a commertial hard or soft IP and UDP IPs, does it make sense just to do=
 with a PHY IP? What is the degree of difficulty, can I find any example?

2) I will need a PHY IP and Intel provides XAUI, 10 GBASE-R and Multi-rate =
PHYs. Also I will need DDRs IP for internal memory interface and PCEe? The =
AFU seems to handle these interfaces to connects to two banks of private DD=
R4-SDRAM memory and to the Intel Xeon processor through the CCI-P interface=
 and then the PCIe link. Does Intel provides them free, or do you need to p=
ay extra money for license?

3) Is there any TCP stack written in RTL (inside the AFU) or should I imple=
ment it by using CPU and Intel PAC together? Can you show a way about this?

Thanks in advance..

- Volkan
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