[OPAE] Intel Fpga BBB Tutorial

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I am at the second part of the tutorial. But I am having difficulties
understanding the mmio addressing part. Specificallly
https://github.com/OPAE/intel-fpga-bbb/blob/master/samples/tutorial/02_plat=
form_ifc/02b_ccip_clock/sw/clock_freq_test.c#L226
why do we multiply the address by 4 but in the hardware part
https://github.com/OPAE/intel-fpga-bbb/blob/master/samples/tutorial/02_plat=
form_ifc/02b_ccip_clock/hw/rtl/afu.sv#L150
it isn't multiplied. Why do we need to multiply it by 4 in the software
part?

Sorry if this is not an interesting question. But I am new and it is
confusing.

Regards
Abel

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