Re: AW: AW: [PATCH 2/2] hwmon: (lm75) Support active-high alert polarity
Guenter Roeck <[email protected]>
| Newsgroups | dev.linux.lists.sashiko,org.kernel.vger.linux-hwmon |
|---|---|
| Message-ID | <[email protected]> |
On 5/1/26 13:42, [email protected] wrote: >> Von: Guenter Roeck <[email protected]> Im Auftrag von Guenter Roeck >> Gesendet: Freitag, 1. Mai 2026 22:14 >> Betreff: Re: AW: [PATCH 2/2] hwmon: (lm75) Support active-high alert polarity >> >>> So this will need separate patches: >>> 1) Fix set_mask and alert handling for AS6200 to be low active >>> and to report the alarm correctly even if it is high active >>> (xor config register bit 5 and 10 (translated to 2 and 13) >>> when reporting the alarm). >>> 2) Fix lm75_write_config() to add set_mask to clr_mask to ensure >>> that the bits which are supposed to be set are actually set. >>> >> >> Turns out the default value for AS6200 has more problems. It is set to >> 0x94c0 which claims to be "8 sample/s, 4 CF, positive polarity". >> >> 0xc0 reflects the samples/s. So far so good. However, 0x94 is wrong. >> It sets the single shot bit, effectively disabling the sensor, and >> it does not set the CF bits as advertised. Please change the default >> to 0x10c0 which reflects the intent more closely, except for the >> negative polarity. > > Understood. I still need advise about xor during alarm report. > Do you talk about this code? > > case as6200: > case tmp112: > - *val = (regval >> 13) & 0x1; > + *val = ((regval >> 13) & 0x1) ^ 0x1; > No, you'll need to xor bit 2 (the polarity bit) and 13 (the alert bit). Something like alarm = !!(regval & BIT(13)) ^ !!(regval & BIT(2)) > Mabye totally stupid but this bug and the deep dive follow up > hits my brain a little bit too hard. > :-) Cheers, Guenter