RE: [cip-dev] [PATCH 6.12.y-cip 00/26] Add RZ/G3L IA55 support

Hi all,

> -----Original Message-----
> From: [email protected] <[email protected]> On Behalf
> Of Pavel Machek via lists.cip-project.org
> Sent: Thursday, July 9, 2026 5:26 AM
> To: Biju <[email protected]>
> Cc: [email protected]; iwamatsu nobuhiro(岩松 信洋 □ＤＩＴＣ○
> ＣＰＴ) <[email protected]>; Pavel Machek
> <[email protected]>; Biju Das <[email protected]>; Lad
> Prabhakar <[email protected]>
> Subject: Re: [cip-dev] [PATCH 6.12.y-cip 00/26] Add RZ/G3L IA55 support
> 
> Hi!
> 
> > The IRQC block on the RZ/G3L SoC is almost identical to the one found
> > on the RZ/G2L SoC, with the following differences:
> >
> >  - The number of GPIO interrupts for TINT selection is 113 instead of 123.
> >  - The pin index and TINT selection index are not in the 1:1 map.
> >  - The number of external interrupts are 16 instead of 8, out of these
> >    8 external interrupts are shared with TINT.
> 
> >  .../renesas,rzg2l-irqc.yaml                   | 157 ++---
> >  drivers/irqchip/irq-renesas-rzg2l.c           | 627
> ++++++++++++++----
> 
> This looks okay to me.
> 
> Reviewed-by: Pavel Machek <[email protected]>
> 

Thanks, I applied with your Reviewed-by tag.

> However... this is unused for the moment, right? I don't see dts changes that
> would actually activate the support.

That's true.
We do need an update commit for dts. And this is already in upstream.
Biju, do you plan to post for this?

> 
> Best regards,
>                                                                 Pavel

Best regards,
  Nobuhiro