[PATCH 6.12.y-cip 19/19] arm64: dts: renesas: rzg3e-smarc-som: Sort GMAC pinmux entries
Biju <[email protected]> Sat, 1 Aug 2026 10:14:50 +0100
| Newsgroups | org.cip-project.lists.cip-dev |
|---|---|
| Message-ID | <[email protected]> |
From: Biju Das <[email protected]> [ Upstream commit 0bbc248fa2cc834392f128bfd127a03f6dbe9d55 ] Sort the pinmux entries for both GMAC ctrl nodes in port order (A/B/C and D/E/F respectively) and remove the extra blank line before the second pinmux assignment. Signed-off-by: Biju Das <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Biju Das <[email protected]> --- .../boot/dts/renesas/rzg3e-smarc-som.dtsi | 49 +++++++++---------- 1 file changed, 24 insertions(+), 25 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi index 0eb0c6e92fd5..f1320ba90aa4 100644 --- a/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi @@ -195,20 +195,20 @@ clk { }; ctrl { - pinmux = <RZG3E_PORT_PINMUX(A, 1, 1)>, /* MDC */ - <RZG3E_PORT_PINMUX(A, 0, 1)>, /* MDIO */ - <RZG3E_PORT_PINMUX(C, 2, 15)>, /* PHY_INTR (IRQ2) */ - <RZG3E_PORT_PINMUX(C, 1, 1)>, /* RXD3 */ - <RZG3E_PORT_PINMUX(C, 0, 1)>, /* RXD2 */ - <RZG3E_PORT_PINMUX(B, 7, 1)>, /* RXD1 */ - <RZG3E_PORT_PINMUX(B, 6, 1)>, /* RXD0 */ - <RZG3E_PORT_PINMUX(B, 0, 1)>, /* RXC */ + pinmux = <RZG3E_PORT_PINMUX(A, 0, 1)>, /* MDIO */ + <RZG3E_PORT_PINMUX(A, 1, 1)>, /* MDC */ <RZG3E_PORT_PINMUX(A, 2, 1)>, /* RX_CTL */ - <RZG3E_PORT_PINMUX(B, 5, 1)>, /* TXD3 */ - <RZG3E_PORT_PINMUX(B, 4, 1)>, /* TXD2 */ - <RZG3E_PORT_PINMUX(B, 3, 1)>, /* TXD1 */ + <RZG3E_PORT_PINMUX(A, 3, 1)>, /* TX_CTL */ + <RZG3E_PORT_PINMUX(B, 0, 1)>, /* RXC */ <RZG3E_PORT_PINMUX(B, 2, 1)>, /* TXD0 */ - <RZG3E_PORT_PINMUX(A, 3, 1)>; /* TX_CTL */ + <RZG3E_PORT_PINMUX(B, 3, 1)>, /* TXD1 */ + <RZG3E_PORT_PINMUX(B, 4, 1)>, /* TXD2 */ + <RZG3E_PORT_PINMUX(B, 5, 1)>, /* TXD3 */ + <RZG3E_PORT_PINMUX(B, 6, 1)>, /* RXD0 */ + <RZG3E_PORT_PINMUX(B, 7, 1)>, /* RXD1 */ + <RZG3E_PORT_PINMUX(C, 0, 1)>, /* RXD2 */ + <RZG3E_PORT_PINMUX(C, 1, 1)>, /* RXD3 */ + <RZG3E_PORT_PINMUX(C, 2, 15)>; /* PHY_INTR (IRQ2) */ }; }; @@ -219,21 +219,20 @@ clk { }; ctrl { - - pinmux = <RZG3E_PORT_PINMUX(D, 1, 1)>, /* MDC */ - <RZG3E_PORT_PINMUX(D, 0, 1)>, /* MDIO */ - <RZG3E_PORT_PINMUX(F, 2, 15)>, /* PHY_INTR (IRQ15) */ - <RZG3E_PORT_PINMUX(F, 1, 1)>, /* RXD3 */ - <RZG3E_PORT_PINMUX(F, 0, 1)>, /* RXD2 */ - <RZG3E_PORT_PINMUX(E, 7, 1)>, /* RXD1 */ - <RZG3E_PORT_PINMUX(E, 6, 1)>, /* RXD0 */ - <RZG3E_PORT_PINMUX(E, 0, 1)>, /* RXC */ + pinmux = <RZG3E_PORT_PINMUX(D, 0, 1)>, /* MDIO */ + <RZG3E_PORT_PINMUX(D, 1, 1)>, /* MDC */ <RZG3E_PORT_PINMUX(D, 2, 1)>, /* RX_CTL */ - <RZG3E_PORT_PINMUX(E, 5, 1)>, /* TXD3 */ - <RZG3E_PORT_PINMUX(E, 4, 1)>, /* TXD2 */ - <RZG3E_PORT_PINMUX(E, 3, 1)>, /* TXD1 */ + <RZG3E_PORT_PINMUX(D, 3, 1)>, /* TX_CTL */ + <RZG3E_PORT_PINMUX(E, 0, 1)>, /* RXC */ <RZG3E_PORT_PINMUX(E, 2, 1)>, /* TXD0 */ - <RZG3E_PORT_PINMUX(D, 3, 1)>; /* TX_CTL */ + <RZG3E_PORT_PINMUX(E, 3, 1)>, /* TXD1 */ + <RZG3E_PORT_PINMUX(E, 4, 1)>, /* TXD2 */ + <RZG3E_PORT_PINMUX(E, 5, 1)>, /* TXD3 */ + <RZG3E_PORT_PINMUX(E, 6, 1)>, /* RXD0 */ + <RZG3E_PORT_PINMUX(E, 7, 1)>, /* RXD1 */ + <RZG3E_PORT_PINMUX(F, 0, 1)>, /* RXD2 */ + <RZG3E_PORT_PINMUX(F, 1, 1)>, /* RXD3 */ + <RZG3E_PORT_PINMUX(F, 2, 15)>; /* PHY_INTR (IRQ15) */ }; }; -- 2.43.0