From: Gaghik Khachatrian <[email protected]>
- Added a new visual_confirm mode VISUAL_CONFIRM_DM_PASSTHROUGH so the confirm
color is supplied by the DM instead of computed by DC.
- Relocated struct tg_color above dc_flip_addrs so it can be embedded by value.
Reviewed-by: Joshua Aberback <[email protected]>
Signed-off-by: Gaghik Khachatrian <[email protected]>
Signed-off-by: Ivan Lipski <[email protected]>
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 8 +++++++-
drivers/gpu/drm/amd/display/dc/dc.h | 1 +
drivers/gpu/drm/amd/display/dc/dc_hw_types.h | 18 +++++++++---------
3 files changed, 17 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 3c6936943960d..1b9bcc3f0d2be 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -1229,7 +1229,9 @@ static void apply_ctx_interdependent_lock(struct dc *dc,
static void dc_update_visual_confirm_color(struct dc *dc, struct dc_state *context, struct pipe_ctx *pipe_ctx)
{
- if (dc->debug.visual_confirm & VISUAL_CONFIRM_EXPLICIT) {
+ /* EXPLICIT and DM passthrough both apply the per-plane color set on the plane state */
+ if ((dc->debug.visual_confirm & VISUAL_CONFIRM_EXPLICIT) ||
+ dc->debug.visual_confirm == VISUAL_CONFIRM_DM_PASSTHROUGH) {
memcpy(&pipe_ctx->visual_confirm_color, &pipe_ctx->plane_state->visual_confirm_color,
sizeof(pipe_ctx->visual_confirm_color));
return;
@@ -3352,6 +3354,10 @@ static void copy_surface_update_to_plane(
surface->time.index = 0;
surface->triplebuffer_flips = srf_update->flip_addr->triplebuffer_flips;
+
+ /* DM passthrough mode: stash the per-flip color on the plane for dc_update_visual_confirm_color */
+ if (surface->ctx->dc->debug.visual_confirm == VISUAL_CONFIRM_DM_PASSTHROUGH)
+ surface->visual_confirm_color = srf_update->flip_addr->visual_confirm_color;
}
if (srf_update->scaling_info) {
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index 1355ce2b49709..d59c23971ef8e 100644
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -653,6 +653,7 @@ enum visual_confirm {
VISUAL_CONFIRM_VABC = 21,
VISUAL_CONFIRM_DCC = 22,
VISUAL_CONFIRM_BOOSTED_REFRESH_RATE = 23,
+ VISUAL_CONFIRM_DM_PASSTHROUGH = 26,
VISUAL_CONFIRM_EXPLICIT = 0x80000000,
};
diff --git a/drivers/gpu/drm/amd/display/dc/dc_hw_types.h b/drivers/gpu/drm/amd/display/dc/dc_hw_types.h
index aeac5a45e13b7..084c506a8a94a 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_hw_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_hw_types.h
@@ -269,6 +269,14 @@ enum dc_pixel_format {
PIXEL_FORMAT_UNKNOWN
};
+#define MAX_TG_COLOR_VALUE 0x3FF
+struct tg_color {
+ /* Maximum 10 bits color value */
+ uint16_t color_r_cr;
+ uint16_t color_g_y;
+ uint16_t color_b_cb;
+};
+
/*
* This structure holds a surface address. There could be multiple addresses
* in cases such as Stereo 3D, Planar YUV, etc. Other per-flip attributes such
@@ -283,6 +291,7 @@ struct dc_flip_addrs {
bool triplebuffer_flips;
unsigned int dirty_rect_count;
struct rect dirty_rects[DC_MAX_DIRTY_RECTS];
+ struct tg_color visual_confirm_color; /* DM passthrough visual confirm color, applied in VISUAL_CONFIRM_DM_PASSTHROUGH mode */
};
enum tile_split_values {
@@ -1187,15 +1196,6 @@ struct mcif_buf_params {
uint8_t tmz_id;
};
-
-#define MAX_TG_COLOR_VALUE 0x3FF
-struct tg_color {
- /* Maximum 10 bits color value */
- uint16_t color_r_cr;
- uint16_t color_g_y;
- uint16_t color_b_cb;
-};
-
struct fva_adj {
unsigned int pixel_clock_100hz;
unsigned int max_pixel_clock_100hz;
--
2.43.0
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