✓ Xe.CI.BAT: success for Add CPU idle state control for accurate vblank timing (rev2)
Patchwork <[email protected]>
| Newsgroups | org.freedesktop.lists.igt-dev |
|---|---|
| Message-ID | <178466766921.213469.3970110594204090217@6beec6c84f66> |
== Series Details == Series: Add CPU idle state control for accurate vblank timing (rev2) URL : https://patchwork.freedesktop.org/series/170451/ State : success == Summary == CI Bug Log - changes from XEIGT_9017_BAT -> XEIGTPW_15574_BAT ==================================================== Summary ------- **SUCCESS** No regressions found. Participating hosts (13 -> 13) ------------------------------ No changes in participating hosts Changes ------- No changes found Build changes ------------- * IGT: IGT_9017 -> IGTPW_15574 * Linux: xe-5448-15b41fd8ef085dbf5b64fe5819415f20bd61983e -> xe-5451-80b509f6e34a01edfccc01a05e3e7062a934bcf9 IGTPW_15574: 15574 IGT_9017: 9017 xe-5448-15b41fd8ef085dbf5b64fe5819415f20bd61983e: 15b41fd8ef085dbf5b64fe5819415f20bd61983e xe-5451-80b509f6e34a01edfccc01a05e3e7062a934bcf9: 80b509f6e34a01edfccc01a05e3e7062a934bcf9 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15574/index.html