[PATCH v4 0/2] Add gem_change_handle_race test suite for DRM_IOCTL_GEM_CHANGE_HANDLE
<[email protected]> Mon, 27 Jul 2026 23:29:22 -0400
| Newsgroups | org.freedesktop.lists.igt-dev |
|---|---|
| Message-ID | <[email protected]> |
From: Vitaly Prosyak <[email protected]> This series adds comprehensive race condition testing for the proposed DRM_IOCTL_GEM_CHANGE_HANDLE ioctl to validate concurrent operation handling in GEM handle management. The test suite is GPU-agnostic and works with both Intel i915 and AMD amdgpu drivers, focusing on proper locking and handle lifecycle management during concurrent GEM operations. v4 changes (addressing Kamil Konieczny's review feedback): - Removed running_under_gdb() function from patch 1 entirely (was wastefully added in patch 1 and removed in patch 2 in v3) - Fixed all double newlines throughout both patches - Moved all formatting/style fixes to patch 1 (patch 2 is now clean): * Removed #define _GNU_SOURCE (already defined by meson build system) * Added header comment explaining tests/intel/ location * Fixed check_kernel_traces() brace style * Enhanced pin_to_cpu() with error handling and ARM compatibility * Fixed variable declarations (C89 style) * Removed unnecessary braces in if statements * Fixed static variable initialization - Patch 2 is now completely clean: only adds new test functions (234 insertions, 0 deletions - no modifications to patch 1 code) - Added git format-patch -v4 for version tracking - Added meson.build entry to patch 1 - Fixed compilation warning: _GNU_SOURCE redefined (removed from source) v3 changes (addressing Kamil Konieczny's review feedback): - Removed reference to external documentation (RACE_CONDITIONS_EXPLAINED.md) - Sanitized test descriptions and comments (security consideration) - Renamed 'race-darknavy-cve' to 'race-close-before-lock' - Renamed internal functions and variables for clarity - No functional changes to test logic v2 changes (addressing Kamil Konieczny's review feedback): - Added header comment explaining why test is in tests/intel/ directory - ARM compatibility fixes (graceful CPU pinning failure handling) - Made pin_to_cpu() handle failures gracefully with igt_debug() v1: - Initial submission with 7 race condition subtests Test coverage: ============== Patch 1 adds 7 race condition subtests: - race-change-vs-close: CHANGE_HANDLE races against GEM_CLOSE - race-change-vs-change: Two CHANGE_HANDLE ops race on same handle - race-change-vs-prime: CHANGE_HANDLE races against PRIME_HANDLE_TO_FD - race-aggressive-change-vs-close: High-iteration close vs change - race-exploit-single-thread: Sequential swap+close pattern - race-exploit-random-handles: Random handle stress test - race-close-before-lock: Close-before-lock scenario with CPU pinning Patch 2 adds 5 edge-case and functional subtests: - noop-same-handle: handle == new_handle returns success (noop) - invalid-new-handle-exceeds-int-max: new_handle > INT_MAX returns -EINVAL - invalid-handle-nonexistent: non-existent handle returns -ENOENT - edge-new-handle-zero: new_handle == 0 (documents current behavior) - functional-rename-verification: Verifies actual rename operation works Testing: ======== Tested on AMD Navi 32 (GFX11) with amdgpu driver: - All 12 subtests compile cleanly - All subtests execute successfully - No compilation warnings The test is located in tests/intel/ following IGT convention for gem_* tests, and uses i915/gem.h infrastructure while remaining vendor-agnostic via DRM core. Cc: Simona Vetter <[email protected]> Cc: Kamil Konieczny <[email protected]> Cc: Christian König <[email protected]> Cc: Alex Deucher <[email protected]> Cc: Jesse Zhang <[email protected]> Vitaly Prosyak (2): tests/intel: Add gem_change_handle_race test suite tests/intel/gem_change_handle_race: Add edge-case and functional subtests tests/intel/gem_change_handle_race.c | 1977 ++++++++++++++++++++++++++ tests/meson.build | 1 + 2 files changed, 1978 insertions(+) create mode 100644 tests/intel/gem_change_handle_race.c -- 2.43.0