Re: [PATCH i-g-t 06/10] tests/intel/xe_pat: Adapt pat_entry_is_wb() to Xe3p

On Tue, Jul 21, 2026 at 03:59:59PM -0300, Gustavo Sousa wrote:
> Xe3p introduces a new device-cache policy called XA, which has the
> longer name "WB Transient App".
> 
> Even though commit 4e59b8e7779b ("lib/intel_pat: use kernel debugfs as
> authoritative PAT source for Xe") already gives a clue that XA is a
> "write-back" cache policy type, pat_entry_is_wb() doesn't really
> incorporate that information.  Add the necessary logic to
> pat_entry_is_wb() so that it also considers XA starting with Xe3p.
> 
> Bspec: 71582
> Signed-off-by: Gustavo Sousa <[email protected]>

Reviewed-by: Matt Roper <[email protected]>

> ---
>  tests/intel/xe_pat.c | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/tests/intel/xe_pat.c b/tests/intel/xe_pat.c
> index 9dd4ffb69d11..bb2975b545e6 100644
> --- a/tests/intel/xe_pat.c
> +++ b/tests/intel/xe_pat.c
> @@ -142,6 +142,13 @@ static bool pat_entry_is_uc(unsigned int gfx_ver, uint32_t pat)
>  
>  static bool pat_entry_is_wb(unsigned int gfx_ver, uint32_t pat)
>  {
> +	if (gfx_ver >= IP_VER(35, 0)) {
> +		uint32_t l3 = REG_FIELD_GET(XE2_L3_POLICY, pat);
> +
> +		return l3 == L3_CACHE_POLICY_WB || l3 == L3_CACHE_POLICY_XD ||
> +		       l3 == L3_CACHE_POLICY_XA;
> +	}
> +
>  	if (gfx_ver >= IP_VER(20, 0)) {
>  		uint32_t l3 = REG_FIELD_GET(XE2_L3_POLICY, pat);
>  
> 
> -- 
> 2.55.0
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation