[PATCH i-g-t] tests/intel/kms_frontbuffer_tracking: skip PSR/FBC subtests disabled by modparam

The enable_fbc and enable_psr module parameters can force FBC and PSR
off regardless of chipset or sink support, but setup_fbc() and
setup_psr() didn't check for that, so the related subtests ran and
failed instead of being skipped.

Check intel_fbc_enable_possible() and is_psr_enable_possible() (also
against PR_MODE, since a sink may use Panel Replay instead of PSR1) in
setup_fbc()/setup_psr() so fbc.can_test/psr.can_test reflect the
modparam state.

Signed-off-by: Mika Kahola <[email protected]>
---
 lib/i915/intel_fbc.c                   | 22 ++++++++++++++++++++++
 lib/i915/intel_fbc.h                   |  1 +
 tests/intel/kms_frontbuffer_tracking.c | 24 ++++++++++++++++++++++--
 3 files changed, 45 insertions(+), 2 deletions(-)

diff --git a/lib/i915/intel_fbc.c b/lib/i915/intel_fbc.c
index ad78ee2a3..9833cc9e3 100644
--- a/lib/i915/intel_fbc.c
+++ b/lib/i915/intel_fbc.c
@@ -20,6 +20,28 @@ void intel_fbc_disable(igt_display_t *display)
 	igt_set_module_param_int(display->drm_fd, "enable_fbc", 0);
 }
 
+/**
+ * intel_fbc_enable_possible:
+ * @drm_fd: Device file descriptor
+ *
+ * Check if FBC is allowed to be enabled by reading the enable_fbc modparam.
+ *
+ * Returns:
+ * true if enable_fbc modparam allows FBC to be enabled, false otherwise.
+ */
+bool intel_fbc_enable_possible(int drm_fd)
+{
+	char *param_value;
+	int enable_fbc;
+
+	param_value = __igt_params_get(drm_fd, "enable_fbc");
+	igt_assert_f(param_value, "Could not read enable_fbc modparam\n");
+	enable_fbc = atoi(param_value);
+	free(param_value);
+
+	return enable_fbc != 0;
+}
+
 /**
  * intel_fbc_get_status_crtc_index
  * @device: fd of the device
diff --git a/lib/i915/intel_fbc.h b/lib/i915/intel_fbc.h
index a82a96d20..1192ebf1b 100644
--- a/lib/i915/intel_fbc.h
+++ b/lib/i915/intel_fbc.h
@@ -14,6 +14,7 @@ enum psr_mode;
 
 void intel_fbc_enable(igt_display_t *display);
 void intel_fbc_disable(igt_display_t *display);
+bool intel_fbc_enable_possible(int drm_fd);
 bool intel_fbc_supported(igt_crtc_t *crtc);
 bool intel_fbc_wait_until_enabled(igt_crtc_t *crtc);
 bool intel_fbc_is_enabled(igt_crtc_t *crtc, int log_level);
diff --git a/tests/intel/kms_frontbuffer_tracking.c b/tests/intel/kms_frontbuffer_tracking.c
index 594644632..4dd2f4e70 100644
--- a/tests/intel/kms_frontbuffer_tracking.c
+++ b/tests/intel/kms_frontbuffer_tracking.c
@@ -2195,6 +2195,12 @@ static void setup_fbc(void)
 		return;
 	}
 
+	if (!intel_fbc_enable_possible(drm.fd)) {
+		igt_info("Can't test FBC: disabled by enable_fbc modparam\n");
+		fbc.can_test = false;
+		return;
+	}
+
 	fbc.can_test = true;
 
 	fbc_setup_last_action();
@@ -2227,6 +2233,20 @@ static void setup_psr(void)
 		igt_info("Can't test PSR: not supported by sink.\n");
 		return;
 	}
+
+	if (!is_psr_enable_possible(drm.fd, PSR_MODE_1)) {
+		igt_info("Can't test PSR: disabled by enable_psr modparam\n");
+		psr.can_test = false;
+		return;
+	}
+
+	if (psr_sink_support(drm.fd, drm.debugfs, PR_MODE, NULL) &&
+	    !is_psr_enable_possible(drm.fd, PR_MODE)) {
+		igt_info("Can't test Panel Replay: Panel Replay disabled by enable_panel_replay modparam\n");
+		psr.can_test = false;
+		return;
+	}
+
 	psr.can_test = true;
 }
 
@@ -2688,11 +2708,11 @@ static void check_test_requirements(const struct test_mode *t)
 
 	if (t->feature & FEATURE_FBC)
 		igt_require_f(fbc.can_test,
-			      "Can't test FBC with this chipset\n");
+			      "Can't test FBC (unsupported or disabled by enable_fbc modparam)\n");
 
 	if (t->feature & FEATURE_PSR) {
 		igt_require_f(psr.can_test,
-			      "Can't test PSR with the current outputs\n");
+			      "Can't test PSR (unsupported or disabled by enable_psr modparam)\n");
 	}
 
 	if (t->feature & FEATURE_DRRS)
-- 
2.43.0